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ELE22MIC Lecture 16

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Polled. Interrupt Driven. Direct Memory Access (DMA) I/O. I/O devices are peripheral devices ... Polled I/O. Transfers take place under main program control ... – PowerPoint PPT presentation

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Title: ELE22MIC Lecture 16


1
ELE22MIC Lecture 16
  • Introduction to Parallel Input Output (I/O)
  • 68HC11 Parallel I/O
  • Ported vs Memory Mapped I/O
  • IO Methods
  • Polled
  • Interrupt Driven
  • Direct Memory Access (DMA)

2
I/O
  • I/O devices are peripheral devices used by the
    processor to sommunicate to the outside world,
    for example
  • terminals,
  • keyboards,
  • displays,
  • mice,
  • network interface
  • sound
  • disk drives
  • printers
  • Analog to Digital Converters

3
I/O Types
  • I/O can be separated to two basic types
  • Parallel
  • Serial

4
I/O Access by CPU
  • Two ways of accessing I/O devices
  • Ported
  • I/O occurs on separate I/O address space
  • Separate In Out instructions to access I/O
  • Separate memory space
  • Different I/O Memory timing constraints
  • Memory Mapped
  • I/O occurs on in memory address space
  • Same instructions timing for I/O as for memory

5
Ported vs Memory Mapped I/O
6
I/O Ports
  • A port is an 8-bit or 16 bit register where data
    en-route from the input, or to the output,
    resides.
  • The microprocessor treats these ports as memory
    locations that may be read-from or written-to.

7
I/O Devices
  • Input devices must hold data for as long as is
    required by the processor to read the data.
  • Output devices must hold data for as long as is
    required by the peripheral to output the data.
  • The I/O devices must transfer data between the
    processor and the port under processor control.
  • For memory mapped I/O they must operate as a
    functional equivalent of memory devices.

8
Simple Parallel I/O (1)
  • Simple Parallel I/O is primitive
  • Simplest form of Output is latching data from the
    data bus
  • Simplest form of Input is reading the state of an
    external device onto the data bus.
  • Example Devices
  • 74HC574 Latch for output
  • 74HC245 buffer for input

9
Simple Parallel I/O (2)
10
Simple Parallel I/O (3)
  • There is no way to asynchronously inform the
    processor when new data is arrived
  • There is no way of telling when the external
    devices has read the current output data and is
    ready for the next data
  • A output port is always an output port
  • A input port is always an input port
  • Neither versatile nor re-configurable
  • Not programmer friendly if data needs frequent
    reading/writing

11
Methods of I/O device access
  • Three main methods of performing I/O
  • Polled IO
  • Interrupt-Driven I/O
  • Direct Memory Access (DMA)

12
Polled I/O
  • Transfers take place under main program control
  • Processor accepts/delivers data when it choses

13
Interrupt-Driven I/O
  • External interrupts trigger the beginning of I/O
    operation
  • The Interrupt Service Routine (ISR) handles the
    I/O transfer
  • Main program is suspended during ISR
  • Sequence Interrupt is signalled.
  • CPU stops current program saves state
  • CPU executes ISR returns
  • CPU restores previous state and continues

14
Direct Memory Access (DMA)
  • Processor address data bus is taken over by a
    DMA controller which performs memory lt-gt I/O
    transfer without CPU control.
  • Separate DMA hardware performs Memory lt-gt I/O
    transfer
  • Main program may/may not be halted during
    transfer depending on type of transfer and
    instruction in execution

15
Peripheral Interface Adapter
  • 1
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