The CPU and Memory June 10, 2003

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The CPU and MemoryJune 10, 2003
Text Chapter. 7 Rev for 3rd Ed June 2003
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Introduction
In a Computer Memory is separate from the
CPU All data is in binary (not decimal)
CentralProcessingUnit
Rev/kc
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System Block Diagram
CPU
Highest Address Memory Lowest Address
ALU
Input/outputinterface
Control unit Program counter
Page 150
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Components of a CPU

• ALU (arithmetic and logic unit)
• Perform arithmetic and logic operations
• Arithmetic add, subtract, multiply, divide, etc.
• Logic AND, OR, NOT, Shift, etc.
• Control unit
• Interprets instructions
• Controls the flow of information within the CPU
• Works with a program counter (address of next
  instruction)
• Input/output interface
• Provides mechanism for input and output of data
• Many variations possible

Page 150
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Program Counter

• Sometimes called instruction pointer.
• Contains address of current or next instruction.
• Usually increased automatically at end of
  instruction cycle, but may be changed
  deliberately by program.
• Changes in PC create branches in program.

( See also Slide 22 )
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Registers

• A register is a storage location within the CPU
• Unlike memory, which is outside the CPU
• Examples of registers
• Accumulator (ACC)
• Program counter (PC)
• Instruction register (IR)
• Memory address register (MAR)
• Memory data register (MDR)
• Status register
• General purpose registers (R0, R1, )
• Included on some CPUs
• Used for high-speed temporary storage

Learn These !!
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Memory Unit
n bits
Memory cell
bit 0
0 1 2 3 4 2n-1
bit 1
Memory address register
Address decoder
bit n - 1
0 1 2 m - 1
Memory data register
m bits
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Memory Capacity

• 2n x m
• n address bits 2n addresses
• m data bits
• m is the width of the data path
• Typical values
• n 16, 17, 18, 19, 20, 21, 22, etc.
• m 8, 16, 32, 64

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Question

• Q How many bits of memory are contained in a
  memory unit with 512KB of memory?
• A 512 29, K 210, B byte 8 23
• 29 x 210 x 23 222 4,194,304

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Exercise Memory Capacity

• Q How many bits of memory are contained in a
  memory unit with 2MB of memory?
• A

Skip answer
Answer
11
Exercise Memory Capacity
Answer

• Q How many bits of memory are contained in a
  memory unit with 2MB of memory?
• A 2 21, M 220, B byte 8 23
• 21 x 220 x 23 224 16,777,216

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Memory Implementations

• RAM random access memory
• Static RAM
• Dynamic RAM
• ROM read-only memory
• EPROM erasable programmable ROM
• Flash ROM
• (Newer still) SDRAM, RamBus

Pages 158 to 160
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Fetch-Execute Instruction Cycle

• No Slide here.
• See text pages 160-161
• Learn Five steps.

Page 160
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Memory Maps

• The usage of memory space on a system is commonly
  depicted in a memory map
• The height of the map is determined by the number
  of addresses
• The width of the map is usually 8 bits
• E.g.,
• a system with a capacity of 216 bytes

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Memory Map
7 6 5 4 3 2 1 0
FFFF 0002 0001 0000
Data bitposition
The bottom of memory
Hexadecimaladdress
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Use of Memory Maps

• Memory maps are usually drawn to show what is
  where on a system
• The possibilities for what
• RAM, ROM, I/O, nothing
• The possibilities for where
• Determined by the starting/ending addresses for
  each block of RAM, ROM, I/O, nothing
• E.g.,
• a memory map for a system with a capacity of 224
  bytes with two 1 MB RAM modules residing
  consecutively at the bottom of memory.

Not in Chapter 7
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Memory Map
FFFFFF 200000 1FFFFF 100000 0FFFFF 00
0000
14 MB empty
224 bytes 16 MB capacity
1 MB RAM
1 MB RAM
Not in Chapter 7
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Exercise Memory Space

• Q A system with a memory capacity of 128 GB has
  four 32 MB memory modules installed. The rest of
  the memory is unused. How much memory space is
  available for future expansion? (Give your answer
  in decimal in megabytes.)
• A ?

Skip answer
Answer
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Exercise Memory Space
Answer

• Q A system with a memory capacity of 128 GB has
  four 32 MB memory modules installed. The rest of
  the memory is unused. How much memory space is
  available for future expansion? (Give your answer
  in decimal in megabytes.)
• A 128 GB 4 x 32 MB
• 27 x 210 MB - 22 x 25 MB
• (217 27) MB
• (131,072 128) MB
• 130,944 MB ? 210 127.875 GB

Ed k c
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Exercise Memory Maps

• Draw a memory map for a system with a capacity of
  2 GB. Assume the system has three 32 MB memory
  modules residing consecutively at the bottom of
  memory. Illustrate the size of each block in MB
  and the starting and ending address of each block
  of memory in hexadecimal.

Skip answer
Answer
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Answer
Memory Map
7FFFFFFF 06000000 05FFFFFF 04000000 03FF
FFFF 02000000 01FFFFFF 00000000
1,952 MB empty
231 bytes 2 GB capacity
32 MB RAM
32 MB RAM
Note2 GB 2,048 MB
32 MB RAM
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Program Counter ( PC )
A dedicated register in the CPU. Contains the
address in memory of the current instruction
being executed. Incremented automatically after
each instruction. May be forced to change eg
jump instruction. Usually initialize to zero
when machine starts, or is reset.
kc
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Instruction Register ( IR )
A dedicated register in the CPU which contains
the actual current instruction.
Op Code Address
What To Do
Location of Data
1101 101101100100
Simple 16-bit example
kc
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Memory Address Register (MAR) Contains Address
in memory to find or place data. Memory Data
Register (MDR) Contains Actual Data to be
placed in location given in MAR, or which has
been retrieved from location given in MAR.
kc
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Accumulator
A dedicated register (or set of registers) in the
CPU used for the actual manipulation of data.
Default source (or destination)
register. Usually contains results of arithmetic
or logical operations.
kc
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Generic CPU With Registers
Program Counter ( PC )
Memory
Instruction Register ( IR )
Memory Address Register ( MAR )
Memory Data Register ( MDR )
Accumulator ( A or Acc )
kc
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Fetch-Execute Cycle

• Two steps, or cycles, in the execution of every
  instruction
• Fetch fetch the code for the instruction from
  memory and place it in the IR (instruction
  register)
• Execute execute the instruction
• A pretty picture sometimes helps

Fetch Execute
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The Store Instruction
PC ? MAR MDR ? IR IRaddress ? MAR A ? MDR PC
1 ? PC
Fetch
time
Execute
Text Pages 160-162, 3rd Ed.
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The Add Instruction
PC ? MAR MDR ? IR IRaddress ? MAR A MDR ?
A PC 1 ? PC
Fetch
time
Execute
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Fetch-Execute Example Load Accumulator
Assume Simple Eight bit system. Thirty-two
memory locations (0 to 31). Load instruction
is 010. Value in location 15 is ten (ie binary
00001010) PC is at 5, about to increment. The
instruction, 01001111, is in location 6.
Then ...
kc
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CPU Before PC increments
Location 31 15 00001010 06
01001111 Location 0
PC 00101
IR (previous)
MAR (previous)
MDR (previous)
A (previous)
kc
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Increment PC PC PC 1
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR (previous)
MAR (previous)
MDR (previous)
A (previous)
kc
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MAR loaded with PC PC -gt MAR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR (previous)
MAR 00110
MDR (previous)
A (previous)
kc
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Memory Location 00110 Accessed and Contents
Placed in MDR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR (previous)
MAR 00110
MDR (previous)
A (previous)
kc
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Memory Location 00110 Accessed and Contents
Placed in MDR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR (previous)
MAR 00110
MDR 01001111
A (previous)
kc
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MDR copied to IR MDR -gt IR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 00110
MDR 01001111
A (previous)
kc
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IR address part -gt MAR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 01111
MDR 01001111
A (previous)
kc
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Location in MAR (01111) Accessed
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 01111
MDR 01001111
A (previous)
kc
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Contents of 01111 loaded into MDR
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 01111
MDR 00001010
A (previous)
kc
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IR op code executed MDR -gt A
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 01111
MDR 00001010
A 00001010
kc
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Finished !
Location 31 15 00001010 06
01001111 Location 0
PC 00110
IR 01001111
MAR 01111
MDR 00001010
A 00001010
kc
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Now Assume Value in location 7 is
10110010. Add instruction is 101. Value in
location 18 is seventy-one (ie binary
01000111) Everything else is as we left it!
Then ...
kc
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PC PC 1
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 01001111
MAR 01111
MDR 00001010
A 00001010
kc
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PC -gt MAR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 01001111
MAR 00111
MDR 00001010
A 00001010
kc
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MAR Accesses Location 00111
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 01001111
MAR 00111
MDR 00001010
A 00001010
kc
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Contents of 00111 -gt MDR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 01001111
MAR 00111
MDR 10110010
A 00001010
kc
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MDR -gt IR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 10110010
MAR 00111
MDR 10110010
A 00001010
kc
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IR address -gt MAR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 10110010
MAR 10010
MDR 10110010
A 00001010
kc
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Location 10010 MAR Accessed
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 10110010
MAR 10010
MDR 10110010
A 00001010
kc
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Contents of 10010 -gt MDR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 10110010
MAR 10010
MDR 01000111
A 00001010
kc
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IR opcode executed A A MDR
Location 31 18 01000111 15 00001010 07
10110010 06 01001111 Location 0
PC 00111
IR 10110010
MAR 10010
MDR 01000111
A 01010001
kc
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To Continue If the next instruction were to
load the Accumulator contents into an area of
memory reserved for screen output (for example),
then the number 81 should appear on the
screen. The process continues in the same
fashion, more or less, until a stop or halt
instruction is encountered.
kc
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Next topic .. Buses
kc
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Buses

• Definition a collection of electrical conductors
  (eg wires, traces) with a common purpose
• Each wire or trace is called a line
• Typically, buses carry information from one place
  to another

From our first lecture
Page 163, ff
Ed k c
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bus
Ports
Printer Mouse Keyboard Modem
Diskcontroller
Graphicscard
Monitor Speakers
CPU
Soundcard
RAM
Networkcard
Computer
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Types of Buses (1 of 3)

• Point-to-point

Serial port
Modem
Control unit
ALU
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Types of Buses (2 of 3)

• Multipoint

Computer
Computer
Computer
Computer
CPU
Memory
Disk controller
Video controller
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Types of Buses (3 of 3)

• Daisy chain

Device controller
Device
Device
Device
Terminator
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Buses Inside a Computer
CPU
Data bus Address bus Control bus
Memory
I/O Module
I/O Device
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Data Bus

• Carries data between the CPU and memory or I/O
  devices
• Bi-directional
• Data transferred out of the CPU for write
  operations
• Data transferred into the CPU for read
  operations
• Typical sizes 8, 16, 32, 64 lines
• Signal names
• D0, D1, D2, D3, etc.

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Address Bus

• Carries an address from the CPU to Memory or I/O
  devices
• Unidirectional
• The address is always supplied by the CPU
• (There is one exception to this, which well
  discuss later.)
• Typical sizes 16, 20, 24 lines
• Signal names
• A0, A1, A2, A3, etc.

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Control Bus

• Collection of signals for coordinating CPU
  activities
• Each signal has a unique purpose
• Typical sizes 10-20 lines
• Signals are output, input, or bi-directional
• Typical signals
• /RD (read)
• /WR (write
• CLK (clock)
• /IRQ (interrupt request)
• etc.

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Thank you
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(No Transcript)
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Memory vs. I/O

• Our system block diagram shows memory and I/O
  connected to the same buses (data, address,
  control)
• This raises the question
• How is I/O differentiated from memory?
• (Well answer this in the next topic)