L1CTT Run IIb Readiness Review

1
L1CTT Run IIb Readiness Review

• The CTT Gang

2
Physics Motivation

• In Run IIa and RunIIb, the L1 Track Trigger
  Provides
• CFT tracks for L1Muon Seeds
• High pT isolated track trigger capability
• CFT tracks CPS clusters ? embryonic electrons
• Found tracks for STT
• As instantaneous luminosities hit 1032, the
  rejection for L1CTT drop drastically.
• Accomplish high eff with low fake rates using the
  full granularity of the CTT.

3
Motivation

• Need much larger FPGA to accommodate the
  increased equation set.
• Add extensive testability of the input and output
  information from the DFEA
• Reduce firmware download times.
• Limited by the slow 1553 interface
• Old method scales up to about 12 hours/job for
  Run IIb equation file sizes
• Concerns about reliability of the download of
  firmware 3-5x the existing size.

4
Changes

• Remove existing DFE crates
• Change access of cables from front to back
• Design new DFE boards for larger FPGA.
• Add front panel LED for status.
• Add input/output buffer sampling on DFEA2
• New crate controller with much faster download
  speed.

5
Questions for Committee

• Does the CTT upgrade follow the Hippocratic Oath?
• First, do no harm
• Does the chances of improving performance
  outweigh any reasonable risks?
• Are there any show stoppers for installation?
• Have we forgotten anything?