ECE6130: Computer Architecture: Instruction Set Architecture

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ECE6130 Computer ArchitectureInstruction Set
Architecture

• Dr. Xubin He
• http//iweb.tntech.edu/hexb
• Email hexb_at_tntech.edu
• Tel [phone], Brown Hall 319

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• Previous Class
• Instructions for control flow
• Encoding in an instruction set
• Today
• Role of compilers

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The Role of Compilers

• Programming done in high-level languages
• Most instructions executed are the output of a
  compiler. Therefore, an ISA is a compiler target
• Architecture decides what Compiler shall express
• Architecture determines what instructions a
  machine must execute
• How compiler and architect affects each other?

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Structure of Recent Compilers
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Goals of a compiler writer

• Correctness all valid programs must be compiled
  correctly.
• Speed of the compiled code (performance)
• Other goals follows above two goals
• Fast compilation
• Debugging support
• Interoperability among languages

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Multi-pass compilation

• The passes in the compiler transform high-level,
  more abstract representations into progressively
  lower-lever representations. Eventually it
  reaches the instruction set.
• It helps manage the complexity of transformations
  and makes writing a bug-free compiler easier.
• Complexity is a major limitation on the amount of
  optimization.

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Phase-ordering problem

• Certain high-level optimizations are performed
  long before it is known what the resulting code
  will look like.
• Once such transformation is made, the compiler
  cannot afford to go back and revisit all steps.
• Compilers make assumptions that later steps are
  capable to deal with certain problems.
• Eg 1. Compilers usually have to choose which
  procedure calls to expand inline before they know
  the exact size of the procedure being called.
• Eg 2. Global common sub-expression elimination

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Types of optimizations

• High-level optimizationsource
• Local optimization basic block
• Global optimization across branches
• Register allocation associates registers with
  operands
• Processor-dependent optimizations take advantage
  of specific archtectural features.
• See figure B.20

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Register Allocation

• Possibly the most important optimization
• Speeds up the code
• Enables other optimizations
• Often use the graph coloring register allocation
  algorithm
• Construct a graph representing possible
  candidates for allocation to a register
• Use the graph to allocate
• Problem is NP-complete however, there are
  heuristics
• Heuristics work well only if gt 16 regs

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Register allocation via graph coloring
A B B C A D D C
A
B
B
A
C
D
C
D
Interference graph
Colored graph
Final code
R1 R2 R2 R2
R1 R1 R1 R2
Use a limited set of colors so that no two
adjacent nodes have the same color.
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Figure B. 21 Program, compiler optimization level
Level 0 unoptimized Level 1 local Level 2
Global Level 3 procedure integration
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Impact of compiler tech on architects decisions

• The interactions of compilers and high-level
  languages significantly affects how programs use
  an ISA.
• Two questions
• How are variables allocated and addressed?
• How many regs are needed to allocate vars
  appropriately?

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Areas where high-level languages allocate data

• Stack allocates local variables
• grows/shrunk on proc call/return
• objects are addressed relative to stack pointer
  (SP)
• primarily scalars, not arrays
• stack is used for activation records, not for
  evaluating expressions
• Global data area
• Allocate statically declared objects (global
  vars, constants)
• Many are arrays or aggregate data structrues.
• Heap
• Allocate dynamic objects
• Objects are accessed via pointers
• Not scalars usually

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Register Allocation

• Effective for stack objects
• Less effective for global variables
• Not effective for heap objects (because they are
  accessed with pointers)
• If a variable is aliased (there are multiple
  ways of referring to address of the variable)
  should not be put in a register
• p a get address of a in p
• a assigns to a directly
• p uses p to assign to a
• a accesses a

Aliasing causes a substantial problem because it
is difficult to decide what objects a pointer may
refer to.
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How the Architect can help Compiler Writer?

• Today, most programs are locally simple, and
  simple translations work fine. (ABC)
• Complexity arises because programs are large and
  globally complex in the interactions.
• Compiler philosophy make the frequent cases fast
  and the rare case correct
• Some ISA properties help the compiler
  writer---gtguidelines

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Use instruction set properties as guidlines

• Regularity operations/data types/addr modes
  should be orthogonal ? means independent
• helps simplify code generation (across passes)
• e.g. if restriction on what regs to use for a
  given instruction may not find right kind
• Provide primitives, not solutions
• special features that match a language construct
  are hard to use. Bad if we change high level
  language
• e.g. VAX calls instruction (Section 2.14, pp142)
• align stack if needed
• push argument count on the stack
• save regs indicated by the mask
• push return adr and the top and base SP
• clear condition codes
• push a word for status info and a zero word
• update the 2 stack pointers
• branch to callee

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Use instruction set properties as guidelines
(cont.)

• Simplify trade-offs among alternatives
• Need to know the costs of using alternative code
  sequences (e.g. caches, pipelines)
• e.g. how many times a variable should be
  referenced before being loaded into a reg.
• Provide instructions that bind the quantities
  known at compile time as constants
• machine should never intercept at run time a
  value known at compile time

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Summary

• A new ISA should have at least 16 GPRs (not
  counting separate registers for FP)
• All supported addressing modes should apply to
  all instructions that transfer data. (Orthogonal)
• Provide primitives instead of solutions
• Simplify trade-offs between alternatives
• Dont bind constants at run time.

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Next

• Case Study MIPS