Sleep Easy Alarm Clock ECE 445 Senior Design

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Sleep Easy Alarm ClockECE 445 Senior Design

• Daniel Kim
• Kevin Lee
• Jonathan Santos

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Introduction

• Five different stages of sleep in normal sleeping
  cycle
• Entire cycle lasts approximately 90 minutes
• If individual wakes up during light sleep, feels
  rested and alert
• If individual wakes up during deep sleep, feels
  tired and groggy

Freq (Hz) Brain Wave Sleep Stage 0.5
3 Delta Deep Sleep 1 2 4 8 Theta Drowsy
Sleep 9 13 Alpha Light Sleep 14 Beta REM,
Awake
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Objectives

• Enable an alarm clock to monitor brain waves via
  electroencephalography (EEG) and process these
  signals using digital signal processing in order
  to wake the user during light sleep
• Recognize when the user has fallen asleep and
  turn off specified appliances recognize when the
  user has woken up, and turn on specified
  appliances.

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Features

• Digital clock display
• Programmable alarm
• Easy Usage
• Ability to turn on and off appliances as you wake
  up and fall asleep, respectively

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Block Diagram
User Interface
Signal Processing Circuit
Alarm Clock Circuit
EEG Circuit
Display Circuit
Relay Circuit
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Original Design
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Project Build
HR MIN Increment Push Buttons
4-position switch
Relay Circuit
Banana Jack Inputs from Electrodes
Appliance Control Switches
Plexiglass Cover
Display Circuit (Signal Processing Circuit and
Alarm Clock Circuit below)
EEG Circuit
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EEG Circuit - Original Design

• 2 Passive Bandpass Filters
• LPF 48 Hz
• HPF 0.48 Hz
• 2 instrumentation amplifiers (AD622AN)
• low DC offset
• low drift
• low noise
• high open-loop gain

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EEG Circuit - Original Schematic
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Gain
Theoretical
Actual
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Passive vs. Active Filters
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Passive vs. Active Filters
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EEG Circuit Final Design

• 3 Ag/AgCl EEG electrodes
• 2 placed on the forehead
• 1 placed on the neck to ground the user
• 3 Conductor Shielded Cable
• 1 Quad Op-amp (MC3403)
• 2 instrumentation amplifiers
  (AD622AN)

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EEG Circuit Demo Design

• Replaced MC3403 with 4 LM741
• Only 1 AD622AN
• Reduced Gain

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New Gain
Theoretical
Actual
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Simulated Frequency Response
Actual Frequency Response
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G1000Vin 1mVInput Freq 75 HzVpp .47
VInput Freq 0.1 HzVpp .231V
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EEG Output
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PIC PCB
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Block Diagram
A/D 200 S/s
Calculate Average
V(t)
Zero-cross algorithm int16 old, new 2
sequential samples Num_zero_cross 0 If (new
lt average AND old gt average, OR new gt average and
old lt average) Num_zero_cross Frequency
Number_zero_cross 2time_interval
Outputs If ( 9 lt Frequency lt 13) sigA
1 Else sigA 0 If (Frequency transitions from
13 Hz or higher to 8 Hz or lower) sigB
1 Else sigB 0
sigA
sigB
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Signal Processing PIC Design

• Original design calculate average on a sliding
  window. Allows for small changes in
  VDC to not affect calculation of
  frequency.
• 2nd Design Pseudo-average calculation
  avg (avg199new_sample)/200
• Final design calculate average on a 1 second
  static window, repeat every 2 sec.
• Reason for deviation not enough buffer space to
  hold enough samples for sliding window had
  problems with division and rounding errors

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Signal Processing Analysis

• Required outputs SigA is high for frequencies
  between 9-13 Hz. SigB goes high on transition
  from above 14 Hz to below 8 Hz.
• Actual SigA output SigA is stable high for
  frequencies between 9.3-13.3 Hz.
• Actual SigB output SigB goes high on transition
  from 14.3 Hz to 8.4 Hz (minimum transition)

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Desired response of SigA
Actual response of SigA
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Some notes on PICs

• We achieved a stable high for SigA for
  frequencies between 9.3 Hz and 13.3 Hz.
• During the demo, SigA was stable high for
  frequencies between 9.3 Hz and 11.5 Hz.

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Alarm Clock Circuit

• PIC16F877A
• Piezo-buzzer
• I/O Diagram

Relay1
Relay2
Alarm off
Night
Day
Night
Day
Alarm on
Set Alarm
Set Time
Hour
Minutes
Alarm Clock
Relay1
sigA
Relay2
sigB
Buzzer
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Keeping Time

• Time is kept in variables, timeHour and timeMin.
• Timer1 is a 16-bit internal counter that is
  incremented every 8 µs. It is set to 3036 as the
  initial value. Timer1 overflows every
  (216-3036) 8 µs 0.5 seconds.
• On overflow, it calls an interrupt handler (every
  0.5 seconds). When the interrupt handler is
  called 120 times, then a full minute has passed,
  and timeMin is incremented.

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Buzzer

• Conditions for the buzzer to sound
• If (sigA is high AND clockTime is within 90
  minutes of the alarmTime)
• set off buzzer
• If( clockTime alarmTime)
• set off buzzer
• Else, turn off the buzzer.

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How accurate is the clock?
PIC Time
www.time.gov

• Design Proposal Accurate timekeeping to within
  1 second every 24 hours.
• Achieved Accuracy In comparison to
  www.time.gov atomic clock, our clock seems to
  meet our initial requirement.

www.time.gov is accurate to within 0.1
seconds Our reflex response to record time is
accurate to at least within a second, if not
better.
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Display Circuit

• 7-segment hex LEDs (LSD3211-11)
• BCD to 7-segment decoders (CD4511)

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User Interface
Can you guess which picture was taken first?
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Relay Circuit

• Potter Brumfield T77S1D10-05
• 10 amp PCB relay
• Min. Contact Load
• 10mA
• 5VDC
• MPS2222A NPN transistor

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Challenges
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Recommendations

• Order PCBs from outside vendors
• Non-conductive box
• Wireless headpiece (electrodes)
• Combine 2 PICs into one to reduce cost
• Design contained power supply
• Additional sensing mechanisms
• Multi-Channel EEG
• Eye movement (EOG)
• Temperature
• Respiration
• Pulse (EKG)
• Muscle tension (EMG)

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Acknowledgements

• Professor Carney
• Hyesun Park
• Alex Spektor
• ECE Parts Shop
• ECE Machine Shop
• Professor Fish

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Questions