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Indirect Memory Access

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When an INTR signal arrives, the processor must know which memory location to ... data bus immediately after the INTR. There are 8 different RST instructions ... – PowerPoint PPT presentation

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Title: Indirect Memory Access


1
Indirect Memory Access and Interrupts in
8085 Prof. Yusuf Leblebici Microelectronic
Systems Laboratory (LSM) yusuf.leblebici_at_epfl.ch

2
Interrupts in 8085
  • In many real-time operations, the microprocessor
    should be able to receive an external
    asynchronous signal (interrupt) while it is
    running a routine.
  • When the interrupt signal arrives
  • The processor will break its routine
  • Go to a different routine (service routine)
  • Complete the service routine
  • Go back to the regular routine

3
Interrupts in 8085
  • In order to execute an interrupt routine,
    the processor
  • Should be able to accept interrupts (interrupt
    enable)
  • Save the last content of the program counter
    (PC)
  • Know where to go in program memory to execute
  • the service routine
  • Tell the outside world that it is executing
    an interrupt
  • Go back to the saved PC location when finished.

4
Interrupts in 8085
INTA
Interrupt
Save program counter
Send out interupt acknowledge
Disable interrupts
Main routine
Go to service routine
Go back
Get original program counter
EI
RET
Service routine
5
Saving the PC in Stack
6
Restart (RST) Instructions
  • When an INTR signal arrives, the processor must
    know which memory location to jump in order to
    execute the service routine !
  • The processor expects an external 8-bit command
  • (RSTx) in the data bus immediately after the
    INTR
  • There are 8 different RST instructions
  • Each RST instruction tells the processor to
    go to a
  • specific memory address (call location fixed)

7
Reading the RST5 Instruction
8
Why 8 Different RST Instructions ?
Multiple interrupts coming from 8 different
external devices
9
Vectored Interrupts
10
Vectored Interrupts
  • There are four other interrupt inputs in 8085
    that
  • transfer the operation immediately to a
    specific address
  • TRAP go to 0024
  • RST 7.5 go to 003C
  • RST 6.5 0034
  • RST 5.5 002C
  • RST 7.5, RST 6.5 and RST 5.5 are maskable
    interrupts, they are acknowledged only if they
    are not masked !

11
SIM Set Interrupt Mask
Accumulator
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