Evaluation of 3D Plus Test Structures

1
4W DC/DC converterSpecifications

• TECHNICAL FEATURES
• Power  4 W
• Input Voltage  22V to 37V
• Output Voltage One Adjustable Output above 3
  adjustable ranges
• 2,5V to 4V/1,2A for a 3,3V Output,
• 3,5V to 6V/0,8A for a 5,0V Output,
• 8,5V to 14V/0,33A for a 12,0V Output.
• Efficiency 72 Min
• Protections Primary Undervoltage lockout,
• Output regulation from 0 to 100 load,
• Permanent output current limitation
• Telecommand Inhibit function
• Switching frequency 330 KHz
• PACKAGING
• Dimensions 32 x 21 x 10,5 mm
• Weight  20 g.

Power layer
Transformer and coils layer
Regulation layer
2
4W DC/DC converter Electrical tests

• Efficiency of 3D DC/DC Converter between 78,7
  for the BiCMOS 12,0 V and 64,9 for the Bipolar
  3,3 V
• Some Efficiency loss may be due to 3D Module
  plating thickness and output voltage range
  programming possibility (impedance mismatch and
  loss in the planar transformer)

3
4W DC/DC converter Radiation Tests

• DC/DC Reference Parametric TID Level
  (Krads) Functional TID Level (Krads)
• Bipolar 3,3V 50
  -
• Bipolar 12,0V 50
  -
• BiCMOS 3,3V 24
  40
• BiCMOS 12,0V 15
  
  24
• Radiation Tolerance of 3D DC/DC Converter between
  15 Krads for the BiCMOS 12,0 V and 50 Krads for
  the Bipolar 3,3 V and 12,0 V
• Radiation Performance of the 3D Module
  significantly better than the individual
  components (example The BiCMOS PWM driver was
  out of the range at 5 Krads)
• Heavy ions tests will be completed by end 2004.
• GLOBALLY SATISFACTORY RESULTS AND START OF THE 10
  W DC/DC CONVERTER DEVELOPMENT IN 2003 UNDER ESA
  CONTRACT.

4
DC/DC Converters using 3D Plus technology10W
DC/DC converter

• Development of the 10W DC/DC converter started
  with an
• ESA contract (design by GAIA and packaging by
  3D PLUS)
• Minimum change introduced in the 10W converter
  parts list (compared to the 4W converter)
• Based on 4W study, only Bipolar technology was
  implemented
• Topology design for 5V only (evolution to 3,3V,
  10V, 12V and 15 V with minor modifications)
• TID and Heavy Ions tests to be performed at two
  levels
• Individual test of the critical components
• Test at Final Product level

5
10W DC/DC converterSpecifications

• TECHNICAL FEATURES
• Power  10 W
• Input Voltage  22V to 37V
• Output Voltage One Adjustable Output 5,0V/2A
• Output Ripple 50 mVpp
• Set Point Accuracy /- 2
• Line Regulation /- 0,6
• Load Regulation /- 0,6
• Efficiency gt 75 Full Load
• Protections - Primary Under Voltage Off/On
  threshold 18V/20V,
• - Output regulation from 0 to 100 load
  (Permanent),
• - Permanent Output Current limitation
• On/Off Telecommand
• Master/Slave parallelization possibility for high
  Power requirements (Synchronization)
• Input Filter (differential mode)
• EMI (MIL-STD-416C) with external filter

6
10W DC/DC converterDevelopment progress status

• Breadboard fully compliant to specification
• 3D DC/DC converter design completed and 5
  prototypes under manufacturing
• 3D Modules (5) to be tested by end 2004
• Radiation tests
• TID test to be performed in November 2004
• Heavy Ions test on stand alone components are
  planned for november 2004
• Heavy Ions test on DC/DC Converter are planned
  for Q1/ 2005

7
4W and 10W DC/DC convertersAvailability
8
Background of 3D Plus Packaging Technology
ESA/CNES Capability Approval Methodology

• The capability Approval sequence of events
• Evaluation testing phase
• Process Identification Document (PID)
• Approval testing phase
• Implementation with the 3D Plus stacking
  technology a coordinated effort of ESA and CNES
  
• Evaluation phase and PID Draft completed in
  august 2001
• Definition of material and processes to be
  evaluated
• Design of the test structure and PID draft
• Manufacturing of test structures and Evaluation
  testing
• Complementary Evaluation testing by NASA-GSFC
• Approval phase started in September 2001
• Manufacturing of test structures according to PID
  (completed feb. 2004)
• Testing phase (completed april 2004)
• Completion of PID and associated procedures
  (outstanding action)

9
Evaluation PhaseTechnology Domain
4 ) Layers stacking
5) Cube Molding
1) Flex Design
7) Cube plating (NiAu)
2) Component assembly
8) Circuit interconnection by laser grooving
3) Circuit Test Screening
9) Cube Test Screening
6) Cube Sawing
10
Evaluation PhaseCESAR Cnes ESA thRee d-plus
Flex 5
Flex 6
Flex 4
Flex 7
Flex 3
Flex 8
Flex 2
Flex 9
Flex 1
Flex 10
CESAR 3D module 114 I/O
11
Evaluation PhaseCESAR Cnes ESA thRee d-plus

• CESAR included 4 TSOP 64 Mb, 8 chip capacitors, 8
  chip resistors, 2 thermal sensors, 2 mechanical
  constraint sensors.
• 10 internal layers Leadframe layer
• Dimensions  26 x 15 x 16,2 mm
• Number of I/Os  114
• Flex assembly technologies involved
• Epoxy attach and Wire bonding
• hand soldering
• EEE Components packages involved
• Bare silicon die (PMOS4 test chip and
• ACM Strain gauges)
• TSOP type II (64Mb DRAM EDO)
• Ceramic and Tantalum capacitors
• Resistors chips

12
Evaluation PhaseTest Plan successfully
accomplished
13
Approval PhaseFlow 1 TSOP Stacking Process
4 ) Cube Molding
6 ) Cube Plating ( Ni Au )
1 ) Package Selection and Procurement ( TSOP, )
7 ) Circuit interconnection by laser grooving
2 ) Component Pins de-bending
3 ) Components Stacking
5 ) Cube Sawing
8 ) Cube Test Screening
14
Approval PhaseFlow 2 Flex Stacking Process
4 ) Layers Stacking
5 ) Cube Molding
1 ) Flex Design
7 ) Cube Plating ( Ni Au )
2 ) Components attachment
8 ) Circuit interconnection by laser grooving
3 ) Circuit Test Screening
6 ) Cube Sawing
9 ) Cube Test Screening
15
For Full NASA Report on 3D Plus Packaging
Evaluation see http//nepp.nasa.gov/DocUploads/6
4CB4357-A232-4136-A4EAE5AA219AD1A7/FinalReport_Eva
l_of_3Dplus_CESAR_Cube_121201.pdf