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Outlay for Calorimeter Pulser Communication

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COMICS (Alan) EPICS (Fritz) VBD (Dean) PIB (Frederic) PULSER ... 96 bits - DC current enable. 6 x 1 bit - command enable. 6 x 8 bits - delay. 32 bits words: ... – PowerPoint PPT presentation

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Title: Outlay for Calorimeter Pulser Communication


1
Outlay for CalorimeterPulser Communication
  • Summary of dedicated
  • D0 calorimeter electronics meeting
  • FNAL, 9/10/99
  • Fritz Barrtelet, Ursula Bassler, Mrinmoy
    Bhattacharjee, Leslie Groer,
  • Frederic Machefert, Bob McCarthy, Bob Olivier,
    Dean Schamberger

2
CALIB
EXAMINE
GUI for pulser setting (Bob)
TAKER (Taka)
COOR (Scott)
datablock structure
Hardware database VME address of RAM start
COMICS (Alan)
EPICS (Fritz)
VBD (Dean)
PIB (Frederic)
program and protocol structure
L3 (Mrinmoy)
PULSER
pulser control block
3
Pulser Control Block
for 1 pulser 18 bits - DAC pulse height
96 bits - DC current enable 6 x 1 bit - command
enable 6 x 8 bits - delay
32 bits words ? 1 ? 3 ? 2
? 6 words x 12 1 pulser 1 status word
for all pulsers 318 bytes
4
COOR structure
simple case with no loops on PIB 1 block of 6
words per pulser 1 word for status bits of all
pulsers
5
RAM
20002000 13 ? 6 words pulser setting 1 status
word EPICS poll bit 13 bits
indicating which pulsers changed
20005000 13 ? 6 words pulser setting 1 status
word CPU poll bit 13 bits indicating which
pulser has an error
VBD
EPICS
EPICS
error bit 20000404
CPU
6
Handshake Protocol EPICS-CPU
P 13 bits status
status word format
P Poll bit used for handshake
7
Ramp mechanism on PIB
To loop over different pulser patterns and pulse
heights could be possible on the PIB and would
prevent to go through the whole path from the
host level to the PIB for each predefined
setting. For this, it is necessary to know the
number of events taken at the PIB-level.
Possibilities - counter of triggers send to the
pulsers on the PIB/VME there are 13 triggers
send out from the TC-cards to each pulser which
should be counted separately? - if the status
of the pulser is read by the VBD for each event
would it be possible to write a bit at each
access and count how often the header was
read? Besides the information send from the host
to the PIB would be more important DAC_initial
value DAC_final value DAC_number of
steps ... information about the pattern
sequence How is the information of the requested
number of events per step transmitted to the TC?
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