SAT Algorithms in EDA Applications

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SAT Algorithms in EDA Applications

• Mukul R. Prasad
• Dept. of Electrical Engineering Computer
  Sciences
• University of California-Berkeley

EE219B Seminar 3 May 2000
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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Recent Advances
• Solving SAT on Boolean networks
• Current research Future directions

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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Recent Advances
• Solving SAT on Boolean networks
• Current research Future directions

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The Propositional Satisfiability (SAT) problem

• Given a formula, f

(a,b,c)

• Defined over a set of variables, V

(C1,C2,C3)

• Comprised of a conjunction of clauses

• Each clause is a disjunction of literals of the
  variables V

Does there exist an assignment of Boolean values
to the variables, V which sets at least one
literal in each clause to 1 ?
Example
abc1
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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Recent Advances
• Solving SAT on Boolean networks
• Current research Future directions

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SAT Applications in EDA

• Combinational ATPG (stuck-at, bridging, delay
  faults)
• Circuit Delay Computation
• FPGA Routing
• Logic Synthesis (viz. redundancy removal)
• Combinational Equivalence checking
• Processor Verification
• Bounded Model Checking
• Functional vector generation
• Crosstalk Noise Analysis
• ..

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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Davis-Putnam, 1960 (Resolution)
• Davis-Logemann-Loveland, 1962 ( Backtracking)
• Recent Advances
• Solving SAT on Boolean networks
• Current research Future directions

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Simple Backtracking Algorithm for SAT
Given CNF formula f(v1,v2,..,vk) , and a total
order on the variables v1,v2,..,vk
Is_SAT(f, A) if Check_SAT(f, A) return SAT
if Check_UNSAT(f,A) return UNSAT v
Next_Variable(f, A) if Is_SAT(f, (A,v0))
return SAT if Is_SAT(f, (A,v1)) return SAT
return UNSAT
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Backtracking Contd...

• Pure Literal Rule Set any unate variables in
  the aaformula to their appropriate polarity

• Unit Clause Rule Assign to true the literal in
  any single literal clauses.
• Iterated application of this is called Boolean
  Constraint Propagation (BCP)

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Resolution (Davis-Putnam 1960)
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Resolution Contd...
Given CNF formula f(v1,v2,..,vk) , and a total
order on the variables v1,v2,..,vk

• For each variable v in sequence of the total
  order
• Resolve out variable v and add all generated
  resolvents to a formula
• Remove all clauses with variable v
• Iterate, till
• All clauses are resolved out gt SAT
• Conflicting pair of unit clauses are created gt
  UNSAT

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Branching Vs Resolution

• Branching
• Linear space (memory) requirements.
• Depth-First search of the solution space.
• Simplistic though highly redundant.

• Resolution
• Worst case exponential space (memory) req.
• Breadth-First search of the solution space.
• Simplistic though highly redundant.

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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Recent Advances
• Non-local implications (SOCRATES, TEGUS)
• The GRASP algorithm
• Recursive Learning
• Solving SAT on Boolean networks
• Current research Future directions

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Recent Advances

• Non-local implications (SOCRATES,TEGUS)
• Usually performed as a pre-processing step
• long implication chains common in SAT on circuits
• Avoid repeated work in BCP

• The GRASP algorithm (Silva Sakallah, 1996)
• Distinguishing feature Conflict analysis

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Main Features of GRASP

• Failure-driven assertions
• Non-chronological backtracking
• Conflict-based equivalence

x1
x2
xj
3
SAT
Xk-1
?
2
xk
1
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Conflict Analysis An Example
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Example Contd Implication Graph
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Example Contd.
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Recursive Learning

• Proposed by Kunz Pradhan as a general technique
  for Boolean Reasoning on logic circuits.
• Basic idea Extract common conclusions by
  examining all possible scenarios of achieving a
  given objective, upto a restricted degree
  (recursion depth).

common conclusions
all possible scenarios
restricted degree
Common Inference !!
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Recursive Learning on CNF Formulas
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Outline

• The Propositional Satisfiability (SAT) problem
• SAT Applications in EDA
• Two classical approaches for SAT
• Recent Advances
• Solving SAT on Boolean networks
• Current research Future directions

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Solving SAT on Boolean networks

• Observation Topological circuit information is
  often crucial to the efficient solution of SAT
  problems posed on logic circuits.
• Natural ordering of variables
• Grouping of variables to reason about
• Natural partitioning of the problem
• Proposed Solutions
• Solve SAT directly on the network
• Augment a conventional SAT solver with a circuit
  layer (Silva et. al. CGRASP)
• Extended Implication graph (Tafertshofer et. al.)

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Current Research Efforts

• Incremental SAT (Sakallah et. al.)
• Pre-processing of SAT formulas (Silva et. al.)
• Dedicated Reconfigurable hardware architecutes
  (Abramovici et. al., Malik et. al.)
• Randomized SAT algorithms for EDA applications
  (Selman Kautz, Singhal Burch)
• Bounded /Directed Resolution

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Suggested Reading

• J. Marques-Silva and K. A. Sakallah, GRASP A
  Search Algorithm for Propositional
  Satisfiability, in IEEE Transactions on
  Computers, vol. 48, no. 5. pp 506-51, May 1999
• J. Marques-Silva and K. A. Sakallah, Boolean
  Satisfiability in Electronic Design Automation,
  to appear at DAC 2000.
• J. Gu, P. W. Purdom, J. Franco, B. W. Wah,
  Algorithms for the Satisfiability (SAT) Problem
  A Survey, DIMACS Series in Discrete Mathematics
  and Computer Science, vol. 35, pp. 19-151, 1997.