Title: Part 2 : Chips for smart cards
1Part 2 Chips for smart cards
- From Memory chips to Microprocessor and
Combi-chips
2The Chip
pad
A Chip
Different memory blocks
Silicon wafer
3Smart Card Chips
- Silicon Technology for smart card ICs
- Memory chips
- Microprocessor-based Smart Card ICs
- Contactless Memory Card ICs
- Smart CombiCard ICs
At the heart of competition !
4Silicon Technology
- Custom technology for smart cards
- EEPROM technology (number of write cycles
10,000 the data retention period 10 years) - Security sensors (HVI, LVI, Temperature,...
Sensors detect tampering and destroy the data in
memory) - Buried ROM layer or metal shield layer (protect
against electron microscopy and physical
tampering) - Scrambled buses (protect from electron
microscopes) - Glued Logic (logical memory mapped onto physical
one in a random fashion one bit is here, another
is there, so that without access to the memory
mapping analysts cannot reconstruct the data) - Other security modules (current scramblers, ...)
- Low-power (2.2V-5.5V CMOS technology)
- Current chips are using 0.25µ to 0.8µ
technologies (small feature size)
5Silicon Technology Evolution
- More Flash / Less ROM for Open OS
- Flash can be written into using the normal card
communication interface, but it can only be
erased as a single block. - More efficient in space and power than EEPROM.
- FERAM (for contactless SC)
- RAM with additional layer which has an effect of
making it non-volatile. - Can be used in place of EEPROM, but is more
efficient (write time nanoseconds requires less
power). - Can perform as volatile and non-volatile memory.
- More powerful core (32bit RISC)
- Advanced security features
6Memory chips
- A non flexible hardware logic
7 Memory chips a fixed physical Mapping
- Example
- Manufacturer issuer area protected by fuses
- Card Secret Code 0 ratification counter
- Access conditions
- Protected area
- 2 User Areas
8Memory chips a limited command set
- Example 3 commands available (cabled logic)
- READ memory
- UPDATE memory
- Verify Secret Code
- Dedicated communication protocol
9Microprocessor chips for smart cards
- The state of the art flexible technology
10Microprocessor architecture
Bus
Co-proc
11Close-up view...
12 Different Types of Memory ...
- ROM CPU only NO ACCESS !
- used for embedded Operating System
- PROM Write once, read FOR EVER !
- Used for initialization area (e.g. Lock bytes)
- EEPROM Write, erase, read FLEXIBLE !
- used to store applicative data or added
functionalities - RAM Write, erase, read TEMPORARY !
- used during power on sessions only
13Evolution of memory capacity
Memory trends 2 every 2 years
14Chip Manufacturing Technology
- Geometry line
- 2001 0.35µ / 0.25µ on EEPROM
- Next 0.18µ versus 0.10µ in other
technologies. - Double PolySilicium, One/Double Metal (used for
inter connection, protection against tampering) - ROM code diffused (not readable optically)
- Up to 25-30 mask levels on 0.25µ techno
- 1 mask per 1.2 day gt 30-45 days for ROM
diffusion - All Products will be 3V5V with very low Power
Consumption
15New Non Volatile Memories 1/2
- Flash EEPROM Memory can be written using the
normal card interface, but can be erased only as
a block - Advantages
- Same memory for Program and Data
- Time to Market reduced for prototyping
- Cell size (element to store 1 bit) ratio vs. E²
1/3 smaller than EEPROM - Disadvantages
- Granularity Data memory 51232 comparing with
1-byte access. - Erase time more important than E² memory
- Cell size larger than ROM (ratio vs. ROM 2/1)
16New Non Volatile Memories 2/2
- FERAM consists of RAM with additional layer,
which has an effect of making it non-volatile
(i.e., retain the data in memory without power) - Advantages
- Same memory for Program and Data and computing
area (RAM). - Same access time for Read, Erase and Write
(nanoseconds vs. milliseconds in EEPROM) - Cell size ratio vs. E² 1/3
- Disadvantages
- Technology under development (new technology),
patented
17Chip features evolution
- Crypto-processor on board
- higher performance in numerical computations
- e.g. exponentiation as required in PK algorithms
- True Random Number Generator (RNG)
- Memory Access Control matrix
- Enhanced security features
- sensors, protection layers...
- Others (enhanced APIs, embedded algorithms)