Designing User Interfaces Spring 1999

1
SE 746-NT Embedded Software Systems
Development Robert Oshana Lecture
33 For more information, please
contact NTU Tape Orders NTU Media
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2
Emulation and Debugging Technology for Embedded
Systems Part 3
3
Agenda

• In circuit emulators
• Vanishing system visibility
• Real time data exchange

4
ICE
5
In circuit emulator

• Single test instrument that integrated various
  functions
• Microprocessor run control
• Debugging kernel
• Memory substitution
• ROM emulator
• Real-time trace
• Logic analyzer

6
Key Blocks

• NMI control logic
• Memory steering logic
• Shadow ROM and RAM

7
General emulator design (next page)
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Core with real time trace
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Real-time trace

• Once the generic emulator is attached to the
  target, getting real-time trace data is trivial
• Already connections to address, data, and status
  busses
• Piggy back logic analyzer onto the same
  connection
• Control processor and observe behavior in real
  time

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HW breakpoints

• Trigger system of the logic analyzer can take
  over some of the functions from the debug kernel
• Set a breakpoint
• Complex break conditions
• Signals as system executes in real-time
• Can also see whats happened in real-time

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Timing constraints

• Emulators cant be used with all systems
• Timing constraints
• Physical constraints

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Debug challenges for embedded systems

• Forces changing development landscape
• System level integration as application
  complexity has increased and system on a chip
  complexity has led to smaller footprints, the
  visibility into the system components has
  diminished
• Embedded system busses lead to an instrumentation
  challenge
• Wider system busses also lead to system bandwidth
  issues
• Program control in these environments is
  difficult

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Restoring visibility

• On chip instrumentation
• Bus snooping logic analyzer functions have been
  implemented in on chip logic
• triggering logic to find the events of interest
• trace collection and export logic to allowing the
  viewing of events
• maximizing export bandwidth per available pin on
  the processor core
• Off chip collection foundation once the data is
  exported from the core, the data must be stored,
  processed, filtered, and formatted in such a way
  as to be useful to those test engineers to
  meaningfully interpret the data

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Restoring visibility

• Data visualization capability
• Embedded system integration capabilities include
  the ability to easily view the data in different
  configurations

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System level integration leads to diminishing
visibility
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Application space diversity

•  Embedded applications are becoming more diverse
• o basestation applications require high
  bandwidth, high frequency debug capabilities
• o  Voice over IP applications require MIPS
  density and many homogeneous processors per
  board.
• o Cell phone and other wireless applications
  require multi-heterogeneous processors and very
  high system level integration
• o Automotive apps require low cost debug
  solutions where chip pins are at a premium

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/
-----
Control
---------
\
/
-----
Visibility
-------
\
/
-
Usage..
\
Real time data
Exe.
Cntl
.
Event triggers
Configuration
Trace
Precise
Long cables (rack
Basestation
triggering
PC Data Trace
High Bandwidth
mount equip)
(High
Perf
, High
Realtime
(constrain high
High BW/pin
point
-
to
-
point
Ganging emulator
Frequency)
BW trace)
tools (high BW)
Realtime
Multi channel
Multi
-
drop
Homogeneous
Shared
Very wide trace
VOIP (Many
Concurrent PC
Real
-
time
triggering
Ganging emulator
Multi
-
Data
homogeneous
trace
components
tools (many chips
processing
exchange
processors)
Selective Data
Cross
-
triggering
per board)
Global
(JTAG)
trace
Commands
Realtime
Small Connection
Multi channel
Multi
-
drop
Wireless
Heterogeneous
Shared
Footprint (in
Real
-
time
Concurrent PC
(Multiple
multi
-
triggering
system debug)
Data
Heterogeneous
trace
processing
components
Short Cables
exchange
Processors)
Selective Data
Global
Cross
-
triggering
(Desk Top, Small
(JTAG)
trace
commands
System Debug)
Automotive
Effective
Effective PC
Small connection
Low cost real
(Extreme cost
Realtime
triggering with
trace with low
footprint (In
-
Time data
sensitivity)
minimal gates
pin counts
system debug)
(JTAG)
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User development environment

•  Development environment for embedded developers
  is changing and debug technologies are changing
  to accommodate these new environments
• Embedded developers are transitioning debug
  platforms from desktop PC systems to laptops
  that are portable to the field for debug in the
  customers environment. Portable remote
  applications require portable debug environments

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Continued clock rate increases

• Embedded core clock speeds increasing
• More data is required to perform debug
• directly proportional to the core clock speed
• More pins and more data per pin is required to
  maintain the required visibility into the
  behavior of the device

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System level integration
Debug
Debug
Debug
Debug
Control
Control
Control
Control
Memory
Memory
DSP
DSP
Trace
Trace
Trace
Trace
Core
Core
Facilities
Facilities
Facilities
Facilities
Cache
Cache
Trigger
Trigger
Debug
Debug
Emulator
Emulator
Emulation
Emulation
Port
Port
Acquire
Acquire
ASIC Logic and
ASIC Logic and
DSP
peripherals
peripherals
SLI environment
SLI environment

100 MHz to 2 GHz clock rates

100 MHz to 2 GHz clock rates
Lower Si costs
ð
emulation on
-
chip, at
-
speed
Lower Si costs
ð
emulation on
-
chip, at
-
speed





Lower
/pin
ð
debug port pins affordable for data export

Lower
/pin
ð
debug port pins affordable for data export

Logic Analyzer functions in emulator
ð
lower cost to user

Logic Analyzer functions in emulator
ð
lower cost to user
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Emulation Basics

• An emulator is a debug tool with two different
  functional groups of features
• simple run control
• allows the embedded developer to control the
  operation of the processor
• Examples of run control actions include GO, HALT,
  STEP, and Hit Breakpoints at given memory
  locations
• capture and record processor activity as shown on
  the processor bus.
• A triggering system allows the developer to
  specify conditions to control capturing of this
  trace information
• The trace system records the processor bus
  activity in high-speed RAM either in the system
  itself or possibly external to the system

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Emulation Basics

• An emulator can be viewed as a hardware device or
  a program that pretends to be another particular
  device or program that other components expect to
  interact with
• Emulators provide visibility into the processor,
  registers, and application software
• allows the software engineer to understand what
  changes are taking place inside of the processor
  as the application executes

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Emulation Basics

• Software engineer can set breakpoints in the
  application based on hardware signal values or
  software locations within the application
• At these breakpoints, the user can understand the
  state of the processor and data and determine if
  their application is still operating correctly
• They can also perform benchmarking (timing
  analysis) and profiling (CPU loading) of their
  application software within the emulator

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Emulation Basics

• Multiprocessor debug can allow the user to debug
  software on several processors at the same time,
  and it provides a method of stopping one or
  multiple processors based on a condition set in
  another processor
• Allows user to capture the entire system state at
  the time in question
• Greatly reduce debugging time in the software
  development cycle

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Emulation Basics

• An emulator is connected directly to the target
  processor
• Electrical signals are sent to the emulator which
  provides access to portions of the processor that
  a standard software debugger cannot
• Engineer can view and modify registers that are
  unavailable to a standard software debugger
• Hardware signaling also allows better run-time
  control

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Emulation Basics

• Emulators also provide the ability to record
  processor activity in real time
• if a problem occurs the developer have a history
  of system activity available to analyze
•  Another advantage of an emulator over a standard
  software debugger is in debugging system startup
  code
• standard software debugger will usually require
  the target operating system in order to provide
  access to the system and the communication port

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Emulation Basics

• During the system initialization process, this is
  not available
• Emulator provides its own communication port
  (usually JTAG)
• Emulators can access any part of the system,
  usually the same visibility as the CPU
• Another advantage of an emulator is in debugging
  systems that have crashed
• If the target system crashes for any reason, the
  operating system usually suspends operation

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Emulation Basics

• This renders the software debugger inoperative
• Emulators are not affected by these types of
  system crashes
• An emulator can preserve valuable trace
  information as well as processor state
  information (such as the register values
• This data can then be analyzed to help determine
  the situation that caused the crash

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Basic emulation components

• The emulation setup is comprised of two tools
• the emulator itself (such as a TI XDS510), which
  controls the information flow to and from the
  target
• debugger, which is the user interface to this
  information
• Beyond the emulation setup is the target
  processor
• Emulation logic within most processors uses the
  Joint Test Action Group (JTAG) standard
  connection in procuring the debug information
  from within the processor

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Basic emulation components

• Debug of the hardware is performed by stopping
  the core to enable information to be scanned into
  and out of the device via the JTAG header
• This information is transferred serially through
  the JTAG port following IEEE 1149.1 JTAG
  specifications
• It is important to understand that this debug
  method is near real time, but is intrusive, as it
  may require that the core be halted to scan the
  information

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Basic emulation components

• While the connection to the JTAG header may be
  the same, the scan chains used for emulation
  purposes are different from those used for
  boundary scan
• Internally to the processor, there are various
  serial scan chains in which the information can
  be scanned into and out of
• The control of which scan chain is used and what
  information is contained in each scan chain, is
  performed by a microprocessor

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Basic emulation components

• This scan manager has the task of controlling
  this information as it is scanned to and from the
  various processors in the scan chain, and
  directing it to and from the various debugger
  windows
• The host of the emulator acts as the scan manager
  as it controls the delivery of the scan
  information to and from the target and the
  debugger window
• For example, the operating system may be a PC and
  the JTAG connection is made through an ISA card

37
Basic emulation components

• Other configurations are possible as well
• When the host CPU, or a separate processor
  controls the JTAG scan information, they need to
  be supplied with information regarding the
  devices included in the scan chain

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39
Real-time data exchange
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RT data exchange Architecture
Host (PC)
Target
RTDX Target Library
Host App
Target App
Code Composer
RTDX DLL
Emulation Logic
Emulator
RTDX Target API
RTDX Host API
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Target-to-Host Data Transfer
Host (PC)
Target
RTDX Target Library
Target App
Host App
Code Composer
RTDXDLL
Emulation Logic
Emulator
data
data
RTDX Host API
RTDX Target API
42
Host-to-Target Data Transfer
Host (PC)
Target
RTDX Target Library
Target App
Host App
Code Composer
RTDXDLL
Emulation Logic
Emulator
data
RR
data
RTDX Host API
RTDX Target API
RR - Read Request
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Signal Display Using Excel
44
Signal Display Using LabVIEW
45
Signal Display Using MATLAB
46
SE 746-NT Embedded Software Systems
Development Robert Oshana End of
Lecture For more information, please
contact NTU Tape Orders NTU Media
Services [phone]
oshana_at_airmail.net
tapeorders_at_ntu.edu