CS310, Computer Architecture

1
The MIPS ISA

• CS310, Computer Architecture

2
Lab This Week

• Back to the Sun Lab!
• Youll demo your microcoded Simple12
• Thus please bring your laptops with ModelSim

3
Final Exam

• In case anyone is making travel plans
• Tuesday, December 9
• 12 PM to 3 PM
• Place TBA

4
Instruction Set

• The vocabulary understood by a computer
• We have seen an example with Simple12
• Simplicity
• Low-level
• Corresponds closely to the hardware
• Almost appeared to be a limited programming
  language
• But of course, we all know all applications
  must be converted to the ISA before being executed

5
Comparison to other Languages

• Instruction Set Architectures are not incredibly
  different across computers
• Hardware technologies based on similar underlying
  principles
• Basic operations are common to all machines
• Considerations
• Simplicity of equipment required to process ISA
• Clarity of its application to problems
• Speed of handling these problems
• Simple12 and MIPS are examples which emphasize
  simplicity.

6
MIPS (1981) Where used?

• MIPS Processors
• Highly used in embedded systems
• 100 million manufactured in 2002
• Not generally used in desktops
• Products from the following
• ATI, Broadcom, Cisco, NEC, Nintendo (the 64 used
  it!), Silicon Graphics, Sony, Texas Instruments,
  Toshiba

7
The first instruction add

• MIPS is not accumulator-based like Simple12
• Rather, it has many registers it can access each
  can hold data
• Well worry about that later
• For now, lets just look at an example which adds
  two numbers and stores the result
• add a, b, c
• Adds two numbers b and c, puts the result in a
• Remember in Simple 12 -gt you needed three
  instructions to do this!
• Lack of registers plus smaller instructions

8
Adding a sequence of values

• Lets do a b c d e
• a can act as an accumulator in this case
• Note in arithmetic instructions, the destination
  is ALWAYS first.
• add a, b, c
• add a, a, d
• add a, a, e

9
Convention Comments

• When writing MIPS programs, we can use the pound
  sign to begin comments
• MIPS simulators will ignore everything following
  a sign
• Cannot continue across lines
• add a, b, c a b c
• add a, a, d a b c d
• add a, a, e a b c d e
• SUB works similarly
• sub f, a, b f a b

10
Lets do some examples.

• C statements
• a b c
• d a e
• f (g h) (i j)
• Hint Youll need temporaries here! For now call
  them t0 and t1.

11
MIPS Registers

• Recall from Simple12, a register is a hardware
  unit composed of flip-flops
• Each flip-flop holds one bit
• In Simple12, we had
• Two 12-bit registers A, MDR
• Two 8-bit registers PC, MAR
• In MIPS, all registers are 32 bits
• 32 bits is one word
• MIPS has 32 registers total.
• In MIPS arithmetic, ALL operands must be chosen
  from one of these registers (so the previous
  slide was a bit illegal).

12
MIPS Registers

• Denoted using a dollar sign () as the opening
  character
• Note register tradeoffs
• More registers -gt more hardware, longer clock
  cycle time, smaller programs in assembly language
• Lets try the previous example
• f (g h) (i j)
• Assume f is stored in s0, g in s1, h in s2, i
  in s3, j in s4
• And two temporary registers t0 and t1
• Represent in MIPS

13
Memory Operations

• With 32 registers, we can only hold so much data
• 32 bits is 4 bytes, the size of an integer
• Obviously, not enough
• Although arithmetic operations can only occur on
  registers, data transfer operations can occur on
  locations in memory.
• The two that are available
• lw (load word)
• sw (store word)
• First, lets review memory

14
Recall Memory

• A contiguous array of data, indexed by the
  address.
• Each address holds one byte (8 bits)

15
Retrieving a Word

• A word actually occupies four memory slots
• 32 bits
• Four eight-bit slots
• So they are addressed in multiples of four
• Word Addresses
• 0,4,8,12,16,20,
• What are always the two least significant bits?

16
lw Instruction

• Stands for load word
• Accepts
• A destination register
• A source register, containing a base address
• An offset from the base address
• For example, lets look at the following C
  statement
• Suppose g and h are integers, A is an array of
  integers
• g h A8

17
lw instruction

• C statement
• g h A8
• Assume g is stored in s1, h in s2, and A is
  stored at location 40 which is stored in s3
• We know that the ninth element of A is 8 words
  away from s3 (remember, the first element is
  zero words away)
• Which is equal to 32 bytes
• We could accomplish this with the MIPS lw
• lw t0, 32(s3) t0 gets the
  contents of A8
• add s1, s2, t0 g h A8

18
Why does this work?

• Lets look at memory
• We are assuming that 0x40 is stored in register
  s3
• The ninth element is 32 bytes away from s3
• We said every location holds a single byte
• Thus the ninth element is at location 40 32 72

19
sw Instruction

• Accepts similar arguments
• A source register
• A destination base memory address
• A destination offset from the base
• Example
• A12 h A8
• MIPS (again, h is in s2 and the starting
  location of A is in s3)
• lw t0, 32(s3) h A8
• add t0, s2, t0
• sw t0, 48(s3) A12 h A8

20
Notes

• Accessing registers is faster than accessing
  memory
• Registers are more useful
• You can do arithmetic!
• With data memory, you have load first into a
  register
• A processor will always try to keep the most
  frequently used variables in registers, and the
  rest in memory
• So it may create intermediate lw and sw
  instructions
• Called spilling registers

21
Immediate Instructions

• Sometimes, you would like to perform an operation
  on a constant
• Thus far, wed have to load a constant from
  memory to use one
• lw t0, Offset(s1) Constant 4 is at
  s1Offset
• add s3, s3, t0 s3 s3 4
• We can accomplish the same with an addi (Add
  immediate)
• addi s3, s3, 4

22
Summary

• What we know so far (five instructions)

23
MIPS Operands

• 32 registers, and Memory

24
OK Now

• Remember, instructions have to be stored as well
  as data.
• Harvard Separate memory
• Princeton Shared memory
• And, everything must be stored internally as
  ON-OFF signals
• Or in binary, as 1s and 0s
• This is machine code
• MIPS instructions are 32 bits long, and can be
  broken into groups of bits called fields.
• Each field has a specific meaning

25
Registers are Numbered.

• s0 - s7 Called saved registers, used to hold
  data for variables
• Map to 16-23 (s0 is 16, s1 is 17, etc.)
• t0 - t7 Called temporary registers, used to
  hold temporary data for operations
• Map to 8-15 (t0 is 7, t1 is 8, etc.)

26
R-Type Two Operand Registers

• Format
• op Opcode
• rs The first operand (a register number)
• rt The second operand (a register number)
• rd The destination register (a register number)
• shamt Shift amount (well use it later)
• funct Function code (select a variant of the
  opcode)

27
Example

• Lets represent as a 32-bit word
• add t0, t1, t2
• Assume the opcode for add is 0 and the function
  code is 32
• This actually is what it is
• Well get into more of what the function code
  means later
• Use 0 for shift amount
• Register numbers from two slides back

28
I-Type One Operand Register, One Operand Constant

• Format
• op Opcode
• rs The source register
• rt The target register
• constant Either a constant (immediate
  instruction) or an offset (memory address)

29
The Constant

• Format
• The 16-bit number is stored using Twos
  Complement
• Thus, what is the highest and lowest
  representable values?
• Why do you think we do not need a subtract
  immediate instruction?

30
Example

• Lets represent as a 32-bit word
• lw t0, 32(s3)
• The opcode for load is 35.
• Format

31
Notes

• Hardware is complicated by multiple instruction
  formats
• MIPS reduces complications
• First three fields of R and I type are the same
• All instructions are the same size
• Differentiation is done by opcode
• For instance, opcode0 must be an R-Type
  instruction
• opcode35 must be an I-Type

32
Summary MIPS Machine Language
33
Examples

• Convert the following to MIPS assembly
• A300 h A300
• Assume s2 holds h and the starting address of A
  is in t1
• Use temporary t0
• Convert the assembly to machine code
• Time pending, well try some other examples