Instructor: Nachiket M' Kharalkar

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Introduction to Microcontrollers

• Instructor Nachiket M. Kharalkar
•  
• Lecture 14
• Date 07/09/2007
• E-mail knachike_at_ece.utexas.edu
•  

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Todays Agenda

• Recap
• Timer Synchronization
• Lab 5 demo
• Output compare interrupt

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ADC
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• ATDCTL20x80 set bit 7 to enable ADC
• ATDCTL30x08 sequence length1
• ATDCTL40x01 10-bit, divide by 2
• ATDCTL5 write channel number to start ADC
• channel number 80 to 87
• ATDSTAT bit 7 SCF
• cleared by write to ATDCTL5
• set when ADC finished
• ATDDR0 first 10-bit ADC result

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• ATDCTL20x80 set bit 7 to enable ADC
• ATDCTL30x08 sequence length1
• ATDCTL40x01 10-bit, divide by 2
• ATDCTL5 write channel number to start ADC
• channel number 80 to 87
• ATDSTAT bit 7 SCF
• cleared by write to ATDCTL5
• set when ADC finished
• ATDDR0 first 10-bit ADC result

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• Position resolution is the smallest change in
  position that your system can reliably detect. In
  other words, if the resolution were 0.01 cm and
  the position were to change from 1.00 to 1.01 cm.
  Resolution will depend on the amount of
  electrical noise, the number of ADC bits, and the
  resolution of the output display software.
• Accuracy is defined as the absolute difference
  between the true position and the value measured
  by your device.

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• precision 10-bit, 1024 alternatives
• range 0 to 5V
• resolution (5-0)/1024 5 mV
• Digital Output 1024Vin/5

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• Voltage range 0-5 V
• Position range 0-1 cm
• 10 bit ADC
• Sampling rate 5Hz (200 ms)
• Nyquist criterion
• Fixed point ? 0.001 cm

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16-bit timer

6812 timer ports.
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PR2 PR1 and PR0 define the TCNT clock period
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Fixed time delay software using the built-in
timer

• Timer_Init
• Initialize Timer
• Input none
• Outputs none
• error none
• Timer_Init
• movb 80,TSCR1 enable TCNT
• rts
• Timer_Wait
• Time delay function
• Input RegD time to wait (125ns cycles)
• Outputs none
• error input must be less than 32767
• Timer_Wait
• addd TCNT TCNT at end of delay
• Wloop cpd TCNT is EndTltTCNT
• bpl Wloop
• rts

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Example

• assume TCNT 31 (can be any value),
• Reg D 4000 (means 1ms, in 250-ns units)
• the addd will make RegD 4031 (remains fixed for
  the rest of the subroutine)
• Run square.rtf, with a ScanPoint on Wloop
• RegD-TCNT
• CCRsXhInzvc RegD4031 TCNT34 3997
• CCRsXhInzvc RegD4031 TCNT40 3991
• CCRsXhInzvc RegD4031 TCNT46 3985
• CCRsXhInzvc RegD4031 TCNT52 3979
• CCRsXhInzvc RegD4031 TCNT4000 31
• CCRsXhInzvc RegD4031 TCNT4006 25
• CCRsXhInzvc RegD4031 TCNT4012 19
• CCRsXhInzvc RegD4031 TCNT4018 13
• CCRsXhInzvc RegD4031 TCNT4024 7
• CCRsXhInzvc RegD4031 TCNT4030 1
• CCRsXhINzvC RegD4031 TCNT4036 -5

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org 3800 Globals go in RamNextT ds
2 timer for next sampleSample ds
2 raw ADC valueDistance ds 2
fixed point Distance in 0.01 cm

• Timer_Sync
• ldd NextT last wait
• addd xxxx RegD is TCNT at end of
  wait
• std NextT
• tloop cpd TCNT
• bpl tloop
• rts
• loop jsr Timer_Sync
• start ldaa 80 right justified
  unsigned 10-bit, Potentiometer connected to AN0
• jsr ADC_In regD has 10-bit sample
• std Sample

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PLLYou dont have to implement this
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Lab 5 Demo
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Interrupt

• An interrupt is the automatic transfer of
  software execution in response to a hardware
  event that is asynchronous with the current
  software execution.
• The hardware could be external I/O device like
  the SCI input/output or an internal event like
  periodic interrupt

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Thread

• A thread is defined as the path of action of
  software as it executes. The execution of the
  interrupt service handler is called a background
  thread.
• The thread is created by the hardware interrupt
  request and is killed when the interrupt service
  routine executes the rti instruction.
• A new thread is created for each interrupt
  request.

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• sei instruction disables interrupts
• cli instruction enables interrupts
• To arm a device means to enable the source of
  interrupts
• In order for an interrupt to be requested, the
  appropriate flag bit must be armed (ex TIOS for
  OC interrupt)
• Whenever an interrupt occurs corresponding flag
  is set in the I/O status register (ex C1F for OC
  interrupt)
• The interrupt service routine must acknowledge or
  disarm the interrupt (ex setting the TFLG1 flag)

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Interrupts

• Why
• Reduce latency in complex system
• Increase bandwidth in complex system
• Handle errors, infrequent but important
• Multithreaded many software functions
• When
• Input when new data received
• Output when device is idle
• Periodic at a fixed-time interval

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Types of interrupts

• Hardware calling software
• RTI clock (periodic) cause RTIhandler
• Output compare interrupts
• RDRF flag call SCIhandler
• TDRE flag call SCIhandler
• Key typed -gt run key handler

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Periodic interrupts

• Real time interrupt
• Timer over flow interrupt
• Output compare interrupt

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Decreasing order of priority
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before interrupt after interrupt
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Registers used to configure periodic interrupts
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OC interrupt

• Enable Set TIOS register bits
• When TCx (x 07) matches TCNT register
  corresponding interrupt occurs
• TxF flag is set when interrupt occurs
• Interrupt period defined by TCNT period delay
  added in ISR
• ISR Acknowledge Set TxF bit
• Set time for next interrupt

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Implementation of OC
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Typical OC handler

• interrupts every 1000 TCNT cycles
• every 1ms
• TC0handler
• ldd TC0
• addd 1000
• std TC0 setp time for next
  interrupt
• movb 01,TFLG1 acknowledge, clear C0F
• rti

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• RTI.RTF
• Jonathan W. Valvano 5/1/06
• test of the RTI system, 6812
• base clock is OSCCLK250nsec
• RTR64 Real Time Interrupt Prescale Rate
  Select Bits
• 000 off
• 001 divide by 1024
• 010 divide by 2048
• 011 divide by 4096
• 100 divide by 8192
• 101 divide by 16384
• 110 divide by 32768
• 111 divide by 65536
• RTR30 Real Time Interrupt Modulus Counter
  Select Bits
• 0000 divide by 1
• 0001 divide by 2
• 0010 divide by 3
• 0011 divide by 4
• 0100 divide by 5