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2' Inside A Computer

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Memory unit : records the program and data. I/O Unit : ... Manages fetching of instructions and data from memory and storing of results in memory. ... – PowerPoint PPT presentation

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Title: 2' Inside A Computer


1
2. Inside A Computer
  • Basic functional units of a computer.
  • Memory, I/O and the clock.
  • Central Processing Unit (CPU).
  • Connecting the units together.
  • Basic architecture of JASPer.
  • Registers.
  • Register transfer language (RTL).
  • Memory organisation.
  • Bytes, words and addresses.
  • Burrell 1, 5.1,6.1,7.1.
  • Clements 1, 5 (Intro), 5.1, 5.2 (Intro), 5.2.1,
    5.2.2, 5.2.3, 8 (Intro).

2
Basic Functional Units Of A Computer
3
Memory, I/O The Clock
  • Memory unit records the program and data.
  • I/O Unit
  • Input unit(s) read in programs and data.
  • Keyboards, EPS machines, mice etc.
  • Output unit(s) write out results and (usually)
    error messages.
  • Screens, printers, speakers etc.
  • Clock synchronises the actions of the other
    units.

4
Central Processing Unit
  • CPU.
  • Performs the basic steps of our programs.
  • Basic steps are called instructions.
  • Instructions specify
  • Operation to be performed
  • Where operands are in memory.
  • Where the result is to be stored.
  • CPU has two major components
  • Arithmetic logical unit (ALU).
  • Control unit (CU).

5
Central Processing Unit II
  • ALU performs the basic data modifications
    required by our programs.
  • Add, subtract, and, or etc.
  • CU co-ordinates the actions of the other units.
  • Uses the PC to keep track of where the machine
    has got to in the program.
  • Manages fetching of instructions and data from
    memory and storing of results in memory.
  • Initiates input and output.

6
Connecting The Units Together
  • A link between two units is called a bus.
  • Private connections between each pair of units
    are not necessary.
  • Several units may share a connecting link.
  • Computers need buses for data, control and other
    signals.
  • The bus structure (i.e. the actual system of
    connections) is a major feature of the
    architecture.

7
Schematic View Of JASPer
8
Schematic View Of JASPer II
  • CPU Control Unit ALU Data Buses Registers
    cache RAM.
  • Registers are used to store information
  • Hold bit patterns.
  • Information can be written to / read from them.
  • Registers are on the CPU chip so access to them
    is much faster than to memory (1000 times
    faster).
  • Some registers are general purpose (totally
    programmer controlled) and some are special
    purpose (partially programmer controlled).
  • Usually the more registers a CPU has the more
    modern it is.
  • Especially GP registers.

9
General Purpose Registers
  • Early CPUs had only 1 GP register the
    accumulator.
  • JASPer has 2 GP registers A and B.
  • Can be used for anything.
  • M68K has 32.
  • 16 data registers.
  • Can be used for anything.
  • 16 address registers.
  • Can only be used to hold memory addresses
    (pointers).
  • More about memory later.

10
Special Purpose Registers
  • Program counter (PC).
  • Holds the address of the next instruction to be
    executed.
  • Partially programmer controlled via branching
    instructions.
  • JASPer only uses LS 12 bits of PC. MS 4 bits
    ignored.
  • M68020 uses all 32 bits of PC (lots more memory).
  • Processor Status Register (PSR).
  • Only uses LS 4 bits Other bits for interrupts and
    future expansion).
  • Flags which are set to 0 or 1 as a side effect of
    various ASP instructions (i.e. partially
    programmer controlled).
  • N Negative. Z Zero. V oVerflow. C
    Carry.
  • Can be tested to control branches.

11
Special Purpose Registers II
  • ALUx holds left hand operand for ALU
    operation.
  • ALUy holds right hand operand for ALU
    operation.
  • R holds result of ALU operation.
  • MAR holds address for data transfer to / from
    memory.
  • MDR holds data transferred to / from memory.
  • INC used to increment PC.
  • IR holds instruction currently being executed.

12
Register Transfer Language (RTL)
  • Notation for explaining the semantics of computer
    operations.
  • 123 Numeric constant 123.
  • reg Register reg.
  • M(adr) Memory location adr.
  • X Contents of X.
  • Copy (C / Java ).
  • Assignment (C / Java ).
  • Example
  • C x y z
  • RTL M(x) M(y) M(z)

13
Register Transfer Language II
  • Sub-fields of registers are selected as follows
  • IR(op-code) Operation code part of IR.
  • Memory transactions are specified as follows
  • M MAR MDR Write.
  • MDR MMAR Read.
  • RTL is a de facto standard for describing machine
    instructions.
  • Syntax is somewhat variable.

14
Memory
  • Memory required for
  • Instructions and operands of currently executing
    program. This is called primary or main or
    immediate access memory.
  • Long term storage of programs etc. in files. This
    is called secondary memory, backing store ...
  • Primary memory must
  • have fast read/write time (access or cycle time).
  • have same access time for all items (random
    access).
  • Secondary memory must be BIG.
  • Dont need fast or random access.

15
Primary Secondary Memory
  • Primary memories are electronic devices (chips
    usually).
  • Cycle times 10-10 Þ 10-12 seconds.
  • Price per bit is comparatively large.
  • Secondary memories are usually magnetic devices
    (disks, tapes, CD ROM etc.)
  • Cycle times 10-5 seconds (very slow).
  • Price per bit is comparatively small.

16
Primary Memory Organisation Bytes
  • Memory chip made up of millions of bistables,
    each representing one bit.
  • Convenient to organise bits in patterns of
    various sizes.
  • Smallest grouping is the byte which is (normally)
    8 bits.
  • A byte can hold 28 256 different bit patterns.
  • A byte is the smallest unit that can be
    transferred to or from the memory in one access.
  • NB JASPer has a 16 bit word and is not byte
    addressable.
  • More later.

17
Primary Memory Organisation Words
  • Made up of a number of bytes which are
    consecutive in memory.
  • Word size varies from chip to chip
  • Bytes Bits Number Of Patterns
  • 2 16 64K
  • 4 32 4096M
  • 8 64 1.8 1019
  • A word is the largest unit that can be
    transferred to or from the memory in one access.
  • For n bit word memory bus must have n wires.
  • Word length fixes memory (and I/O) bus width.
  • Word length fixes register width.

18
Primary Memory Organisation Addresses
  • Programmers specify particular memory locations
    using numerical addresses.
  • In effect
  • ByteSize memory
  • Usually a word must start on a even address as
    words are even numbers of bytes.
  • Operands can be bytes or words (sometimes
    longwords).
  • Operands are specified by the address of their
    first byte.

19
JASPer Memory Organisation Addresses
  • Programmers specify particular memory locations
    using numerical addresses (0-FFF).
  • In effect
  • Word4096 memory
  • JASPer uses a 16 bit word.

20
Summary
  • Functional units memory, I/O, clock, CPU ( ALU
    control).
  • Remembering, communicating, synchronising,
    working.
  • ALU performs basic data modifications. Control
    unit controls behaviour of CPU units.
  • Bus connection between 2 (or more) units.
  • ASP registers
  • GP A and B.
  • SP ALUx, ALUy, R, PC, INC, IR, MAR, MDR, PSR.
  • RTL is a way of specifying semantics of
    operations.

21
Summary II
  • Memory used to hold programs and data.
  • Primary memory has fast access time and random
    access. Usually chips.
  • Secondary memory is slow and non-random access
    but its big. Usually magnetic devices.
  • Byte is 8 bits. Smallest addressable item.
  • Smallest addressable item on WinASP is 16 bit
    word.
  • Word is 2, 4 or 8 bytes. Largest addressable
    item.
  • Bytes in primary memory are specified via
    numerical addresses.
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