Transmission Gates and Sequential Circuits

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Transmission Gates and Sequential Circuits

• Dr. T.Y. Chang
• NTHU EE
• 2005.10.11

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Contents

• CMOS Logic
• NMOS Transmission Gate
• CMOS TX Gate
• Sequential Logic
• Text Book D.A. Neamen, Electronic Circuits
  Analysis And Design, 2nd ed. Chapter 16.

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Clocked CMOS
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C2MOS AND and OR function
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C2MOS General Form
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C2MOS of function (ABC)
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NMOS TX Gates
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Vi and Vo of NMOS TX Gate
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Example 16.13 _at_p1060

• Estimate the Vo decreasing rate with initial
  condition of Vo4V and iL1nA, and CL1pF.

(n10?9, p10?12)
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Example 16.14 _at_p1061

• Find Vo if Vi 0 and 5V with VTNL?1.5V, VTN0.8V
  and KD/KL3.

(ABC5V)
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NMOS Pass logic
ABAB Logic-1 VDD-VTN Logic-0 0V
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NMOS Pass logic Example
P1AB P2ABP3AB P4AB Logic-1
VDD-VTN Logic-0 0V
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Potential Problems

• Floating node (May have charge sharing)
• (A,B,C)(0,1,X) or (0,X,0)
• Conflict logic
• (A,B,C)(1,0,1)

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Design fABC with problem
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Design fABC
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CMOS TX Gate
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CMOS TX Gate Operations
S
S
D
D
D
S
D
S
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CMOS TX Gate Cross Section
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CMOS Pass Logic

• TX Connects to VDD ? PMOS
• TX Connects to GND ? NMOS

(AAC)DBDABC
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Dynamic Shift Register
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Operations
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CMOS Shift Register
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RS Flip-Flop (NMOS)
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RS Flip-Flop (CMOS)
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D FF
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Master-Slave D FF
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Problem

• For the figure below, what is (are) the potential
  problem(s).