Branch Prediction

1
Branch Prediction

• Kevin Skadron
• Computer Architecture

2
What is Branch Prediction For?

• Branches dictate which instructions to execute
  next
• But they create control hazards

if
jump
3
What is Branch Prediction For?

• Resolving the branch introduces a delay

jump
if
IF
ID
EX
MEM
WB
fetch
resolve
4
What is Branch Prediction For?

• But resolving the branch introduces a delay

IF
ID
EX
MEM
WB
fetch
resolve
5
What is Branch Prediction For?

• Branch resolution introduces a delay

IF
ID
EX
MEM
WB
fetch
resolve
6
What is Branch Prediction For?

• Branch resolution introduces a delay

IF
ID
EX
MEM
WB
fetch
resolve
7
What is Branch Prediction For?

• Branch resolution introduces a delay

IF
ID
EX
MEM
WB
fetch
resolve
8
What is Branch Prediction For?

• In todays pipelines, it is a very expensive
  delay!

IF
WB
fetch
resolve
9
Fetch Organization
4
PC
I
to decode
dir-bpred
BTB
10
Dynamic Branch Prediction
1. Bimodal prediction
baddr
(i.e., PC)
00 strongly NT 01 weakly NT 10 weakly T 11
strongly T
Taken / Not taken

• J. Smith (1981)
• Appears in the Alpha 21164, Sun UltraSPARC, MIPS
  R10000, etc.
• Early 90s

11
Dynamic Branch Prediction
2a. Global, two-level prediction
history
T/NT

• Helps predict correlated branches
• Used in most modern chips today except Intel

if (x) if (y) if (x y)
12
Dynamic Branch Prediction
2a. Global, two-level prediction
2b. Local, two-level prediction
baddr
history
history
T/NT
T/NT
Examples TNTNTN ? T

• Helps predict loops and other branches with
  repeating patterns
• Used in most recent Intel CPUs
• Two-level prediction proposed in 1992 by Yeh and
  Patt and Pan, So, and Rahmeh

13
Dynamic Branch Prediction
2a. Global, two-level prediction
2b. Local, two-level prediction
baddr
history
history
T/NT
T/NT
3. Hybrid prediction

• Some branches benefit from global, others
  from local history
• McFarling (1993, DEC)
• Alpha chips used this

pred2
pred1
T/NT
selector