MIPS R2000 Assembly Language

1
MIPS R2000 Assembly Language

• CS 230
• ???

2
MIPS Architecture
memory
CPU
Coprocessor (FPU)
Registers
Registers
0
0
31
31
Arithmetic unit
Multiply
Arithmetic Unit
Lo
Hi
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User Address Space
7FFFFFFF16
stack

• Stack grows/shrinks as procedures are
  called/returned
• Dynamic area is used for malloc()
• when the size of a data is unknown at
  compile(assemble) time
• Static area
• for data whose size is known a priori
• text
• executable image of a program

Dynamic data
1000000016
Static data
40000016
text
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Assembler
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5
Assembler Syntax

• .data data items, i.e. all initialized and
• non-initialized items go in here
• item .word 1
• .text beginning of user text
• .globl main declaration of main as a
  global variable
• your main subroutine code goes in here
• main li t2, 2
• li t3, 3
• li t4, 4
• add t1, t2, t3
• add t1, t1, t4
• div t1, t1, 3
• lw t0, item
• the last line of main
• done
• END OF PROGRAM (leave this line here)

6
MIPS Assembler Directives

• alignment
• align 1 byte alignment
• align 2 word boundary
• align 3 double word boundary
• align 0 turn off the alignment
• data store
• byte(half, word, float) b1, b2, .., bn store n
  consecutive bytes(2 bytes, word, double word) on
  the memory
• .byte 3, 7, 100
• .word 1, 1024, 9999
• .ascii this is a string without null
  terminate
• asciiz for null termination
• program segments
• .data
• .text

7
Register Naming
number
name
usage
0
zero
constant 0
1
at
reserved for assembler
2 3
v0, v1
expression eval and results of a function
4 7
a0 a3
arguments
8 15
t0 t7
temporary
16 23
s0 s7
saved (preserved across call)
24, 25
t8, t9
temporary
26, 27
k0, k1
reserved for OS
28
gp
pointer for global area
29
sp
stack pointer
30
fp
frame pointer
31
ra
return address
8
MIPS Addressing - base addressing
lb t0, 4(t2) load a byte from memory into
t0
op
rs
rt
16 bits immediate
lb
t2
t0
4
100000
01010
01000
000000000..00100
memory

t2
B
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t0
9
Base Addressing

• When do you use this intruction?
• to move a data from memory to a register (or vice
  versa)
• other loads (and stores, of course)
• lw 5, address load byte
• ld 5, address load double at 5, 6
• lh 5, address load half word
• la 5, address load computed address,
  not value
• this is NOT base addressing
• example array
• la t0, array
• lw t1, 4(t0)
• lw t2, 8(t0)
• lw t3, 12(t0)

• la t0, array
• addi t0, 4
• lw t1, (t0)
• addi t0, 4
• lw t2, (t0)
• addi t0, 4
• lw t3, (t0)

10
MIPS Addressing register addressing

• add 8, 17, 18 8 17 18

op
rs
rt
rd
shamt
function
000000
17
18
8
unused
add
17
18
8
0
32
17
8

18

• function field decides the actual action !

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opcode structure
opcode
funct
000000 sll 000001 000010 srl 000011
sra 000100 sllv 000101 000110 srlv 000111
srav 001000 jr 101000 101001 101010
slt 101011 sltu
000000 000001 000010 j 000011 jal 000100
beqz 000101 bne 000110 blez 000111 bgtz 001000
addi 101000 sb 101001 sh 101010 swl 101011
sw
rt
000000 bltz 000001 bgez 000010 101000
101001 101010 bltzal 101011 bgezal
some branch instructions
register operations
general operations
12
MIPS Addressing - Immediate addressing

• addi t1, t0, 4 t1 t0 4

op
rs
rt
immediate
addi
t0
t1
4
001000
01000
01001
000000000..00100

t0
t1
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Immediate Addressing

• things to consider
• how many bits are left for the immediate value?
• there is a certain limit on the value you can use
  !
• you shouldnt use it for the data to reuse
• the data is a constant within the instruction
• but, simpler than other addressing
• no memory access fast execution

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MIPS Addressing jump instruction

• j next_location jump to the instruction at
  next_location

immediate
op
j
location
000010
000000000..0010111000000100

00
add 2 zeroes since instructions are word-aligned
PC
15
Addressing Mode PC relative
beq 5, 7, XXX jump to XXX if 5 7
6 5 5 16
Memory
op
rs
rt
Address

Instruction Word
PC

• PC value is added to address field to make the
  target address
• there are only 16 bits left for the address !!
• there is a program locality
• all the conditional branch instructions use this
  format
• this is the same as the immediate addressing !
• they need registers to check a condition

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Branch Instructions using rt field
op
rs
rt
16 bit offset
000001
17
000000
0001000111001100

• branch to PCoffset if rs lt 0
• there is only one register(rs) left for condition
  checking
• you cannot compare two registers
• you can just compare a register with zero
• rt fiels decides exact operations
• various conditions ltz, gtz, eqz, gez, lez, ..
  (all end with z)
• branch types with link or w/o link
• 16 bit offset is enough?

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Branch and Jump

• Instructions
• bne t4,t5,Label Next instruction is at Label
  if t4 ! t5
• beq t4,t5,Label Next instruction is at Label
  if t4 t5
• j Label Next instruction is at Label
• Formats
• Addresses are not always 32 bits
• branch target address immediate value PC
• jump target address immediate value

op
rs
rd
16 bit immediate
I J
op 26 bit address
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Program Control

• Decision making instructions
• alter the control flow, i.e., change the "next"
  instruction to be executed
• MIPS conditional branch instructions bne t0,
  t1, Label beq t0, t1, Label
• Example if (ij) h i j bne s0, s1,
  Label add s3, s0, s1 Label ....

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Program Control (contd)

• MIPS unconditional branch instructions j label
• Example if (i!j) beq s4, s5, Lab1
  hij add s3, s4, s5 else j Lab2
  hi-j Lab1 sub s3, s4, s5 Lab2 ...
• Other jump instructions
• jal label jump and link
• jr 5 jump to the address in 5
• jalr 5 jump to address in 5 and link

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Other Control Flow

• New instruction if s1 lt s2 then
  t0 1 slt t0, s1, s2 else t0
  0
• Can use this instruction to build "blt s1, s2,
  Label" can now build general control
  structures
• there are others
• slti, sltiu, sltu,
• what are the reasons for these instructions?
• there are enough branch instruction !
• do we still need more ?

21
Large Constant

• We'd like to be able to load a 32 bit constant
  into a register
• Must use two instructions, new "load upper
  immediate" instruction lui t0,
  1010101010101010 upper 16 bits
• Then must get the lower order bits right,
  i.e., ori t0, t0, 1010101010101010

t0 contains 1010101010101010
0000000000000000
1010101010101010
0000000000000000
t0
0000000000000000
1010101010101010
ori
22
MUL and DIV

• two additional registers
• hi and lo
• mul 9, 5, 8 9 5 8
• it is a pseudo-instruction
• assembler expands it to other instructions
• mult 5, 8 hi, lo 5 8
• mflo 9 9 lo
• other instructions
• mfhi use if you want to check overflow
• mthi (mtlo) 7 use to move data to hi or lo
• Division
• div 3, 9, 5 3 9 / 5
• assembler expands it to
• div 9, 5 lo 9 / 5, hi 9 mod 5
• mflo 3

Registers
0
31
Arithmetic unit
Multiply
Lo
Hi
23
Example 1 find max from an array
.text .globl main main la t0, array t0
points the array lw t1, count lw t2, (t0)
t2 will contain max loop lw t3,
4(t0) ble t3, t2, notM move t2,
t3 notM add t1, t1, -1 add t0, t0,
4 bnez t1, loop la a0, string1 li v0, 4
this syscall is for syscall printing a
string move a0, t2 li v0, 1 integer
printing syscall li v0, 10 exit
syscall syscall
.data array .word 3, 5, 5, 1, 6, 7,
.. count .word 15 string1 .asciiz \nmax
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Example 2 Indexed addressing
count the occurrence of a specific char in
string str whose address is 0x10010000 li
t1, 0 t1 will be the arrar index li
t2, 0 t2 will be the counter lb t3,
char loop lb t0, str(t1) fetch a char to
t0 beqz t0, strEnd null-terminated string
has zero at the end of the string bne t0, t3,
con add t2, t2, 1 increase the
counter con add t1, t1, 1 increase the
index j loop strEnd write output routine
here data segment . data str .asciiz
abdlfjkwkjeelfkejlasdf char .asciiz e
str is 32 bits how can this instruction can
be encoded? - assembler converts it into lui
at, 0x1001 addu at, at, t1 lb t0, (at)
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Logical Shift Instructions

• change the positions of all bits in a register
• shift left 0s are always shifted into the
  low-order bit
• sll t1, t2, 7 shift left 7 bits, padding
  0s
• sllv t1, t2, t3 shift t3 bits (up to 32)
• shift right has two flavours
• logical srl , srlv puts 0s into the
  high-order bit
• arithmetic sra, srav the high-order bit is
  preserved
• rotate right/left
• rol t3, t5, t1 rotate left t5 by t1, and
  store in t3
• ror rotate right

26
Example Convert decimal to hex
t2 holds the integer value t0 holds the
number of hex digits, i.e., 8 la t3,
result loop rol t2, t2, 4 work on the
first hex and t1, t2, 0xf mask the first
hex digit ble t1, 9, print if 0-9,
print add t1, t1, 7 7 chars betwn 9 and
A print add t1, t1, 48 ascii 0 is
48 sb t1, (t3) save it at result
area add t3, t3, 1 advance a
pointer add t0, t0, -1 dec
counter bnez t0, loop .. result .space
8 assume this address is 0x1001000a
result is 32 bits - assembler converts it
into lui at, 0x1001 ori t3, at, 0xa