Dr.%20Un-ki%20Yang

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Amplifiers and Feedback 3
Dr. Un-ki Yang Particle Physics Group
ukyang_at_hep.manchester.ac.uk or Shuster 5.15
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Web page for Amp Feedback
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Realistic OP Amplifier review

• Gain is NOT infinite
• Gain is NOT constant against frequency
• Output response is NOT instantaneous
• Output impedance is NOT zero
• Input impedance is NOT infinite

• Gain drops at high frequency

• Bandwidth a stable range. -3dB

• Slew rate response rate

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Positive Feedback review

• Negative feedback stabilizes the circuit
• Positive feedback saturated output, (/- 15 V)
  thus used for digital electronics.

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Schmitt Trigger review

• Two different thresholds V, depending on
  Vout fix a problem for noisy signal

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Schmitt Trigger
threshold V
t V
tlt to V(H)
t gtto V(L)
t gtt1 V(H)
t gtt2 V(L)

• Noisy problem is fixed

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Analogue to Digital conversion (ADC)

• Why digitized signal?
• Analogue signals can be distorted and
  attenuated
• Practically impossible to analyze many analogue
  channels

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Analogue to Digital conversion (ADC)

• Fast conversion (sampling rate)
• High accuracy (resolution)
• Linearity

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ADC

• Sampling rate how often do we need to digitize
  analogue signal?
• good to have a high sampling rate but requires
  fast processing
• Nyquist rate use 2 x highest frequency of the
  signal

• Resolution digitization introduces uncertainty
  due to a finite step size.
• Good resolution large number of ADC bits 2n,
  but requires fast processing and
  many chips
• Resolution LSB/2

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Comparator
VoutG0(V - V-) Vout 15V if V gt V-
-15V if V lt V-

• 1 bit ADC to provide a digital output indicating
  which of two analog input voltage is larger
  the simplest ADC
• Properties very fast (1 clock cycle), very cheap
• but very poor resolution
  (30)

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Flash ADC

• For n-bit, use 2n-1 comparators
• Each comparator has its own threshold voltage,
  separated by 1 LSB
• The input to all
  comparators in parallel (one clock cycle)
• Output goes to an encoder to get binary format

3-bit ADC
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Flash ADC

• Very fast (basically only one clock cycle) good
  to process high rate events (10k Hz etc)
• Buy requires so many comparators
• for high accuracy (good resolution) very
  expansive. (32-bit 4X10E9 comparators )

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Slope Converter
Slope 1/RC Vin

• Use one integrator and one comparator

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Slope Converter ADC

• Advantage good resolution with only
  two comparators
• Does not require precise components
  cheap, designed to average out noise
• Disadvantage slow, 2n clock cycles
• for n-bits

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Successive Approximation ADC

• Use a successive approximation register
• Comparator check Vin vs DAC reference
  signal ( MSB --gt LSB ) binary search
• Advantage faster, only n clock cycles for n-bit
• Disadvantage register for DAC need to be
  extremely accurate

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DAC (Digital-Analogue-Converter)
MSB
LSB