RealTime Power Electronics Simulation

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Real-Time Power Electronics Simulation

• VTB Review Meeting
• July 16-17, 2002
• McLeod Institute of Simulation Sciences
• California State University, Chico

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Project Goals

• Real-time simulation of power electronic systems
  with frame times of less than 10 µsec
• Integration with VTB/VXE
• Hardware in the loop simulation

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Basic Approach

• Arrays of digital signal processors form
  simulation engine
• Commercial 4-processor board plugs into PCI bus
  of PC
• A/D D/A mezzanine board
• D/D Link Port connection to external DSP
• Coding in C
• VTB/VXE runs on PC host

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Simulation Platforms

• PC only
• Used for initial development and demonstrations.
• Transtech 4AD21062 processor PCI board
• 40 MHz processors
• 33 MHz 32-bit PCI bus
• No analog interface
• Bittware 4AD21160 processor PCI board
• 80 MHz processors
• 66 MHz 64-bit PCI bus
• 8A/D, 4D/A, 16-bit, 100kHz, simultaneous
  sampling

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Current Models (PC and DSP Versions)

• 6-pulse, back-to-back without filters
• 6-pulse, back-to-back with filters
• 6-pulse, 3-level back-to-back with filters
• 12-pulse, 2-level, back-to-back with filters

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VTB/VXE Interface

• Parameter entry and control of execution and
  output through VTB interfaces
• Output graphing uses VXE
• DSP models give windowed data with time reference
• Parameter changes during execution

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Design Criteria for VTB Integration

• DSP-based models must run in real time
• Graphical output and user-interface must not
  affect model timing
• Models should run continuously, without
  interruption by PC
• Non real-time, PC-only models are also required
• Readily available environment for testing and
  development
• Two models should give identical results
• Input data files and user interface as identical
  as practical
• Maintain look and feel of VTB/VXE environment
• Ability to interface to external hardware
• Models should facilitate verification and
  validation

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Timing Measurements

• Fast 6-pulse back-to-back model
• Bittware 80Mhz, 4 processor, 21160 board
• 6-pulse BTB model (w/o filters) working with 5.4
  µsec
• Converter calculations ported and tested with
  3.75 µsec
• Both controllers, generators, capacitor
  submodels 4.4 µsec
• Time could be halved by separating controllers in
  two processors
• Prospects for Bittware port of fast 6-pulse model
• 6-pulse BTB model (w/o filters) with 4.5 µsec

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Integration Time Steps

• Experimental investigations with current models
  indicate that the following maximum integration
  steps will be required for PWM control
• 10 µsec for 1kHz PWM (15line frequency)
• 6 µsec for 2 kHz PWM (33line frequency)
• 3 µsec for 20 kHz PWM (333line frequency)

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Hardware in the Loop
ADSP 21060
ADSP 21160
ADAPTOR
TTC 27-X Link port cable
CAHC L-26 Link port cable
RMCA-26JL-AD
AMP 1 1-104074-0
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Execution Speed

• Approaches to faster execution
• More efficient C source code
• More efficient assembly language
• NO HAND CODING all executable code to be
  generated automatically to maintain configuration
  control and maintainability of code.
• Identify common code combinations and write a
  post-processor to optimize compiled code
• More efficient inter-processor communication