Origin: Kirkpatrick et al', "Optimization by Simulated Annealing", Science, 1983 - PowerPoint PPT Presentation

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Origin: Kirkpatrick et al', "Optimization by Simulated Annealing", Science, 1983

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Apply: any combinatorial optimization problem. TSP. VLSI CAD. Shen Wan. Simulated Annealing ... www.gnu.org/software/electric/electric.html. Shen Wan. Simulated ... – PowerPoint PPT presentation

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Title: Origin: Kirkpatrick et al', "Optimization by Simulated Annealing", Science, 1983


1
Introduction
  • Origin Kirkpatrick et al., "Optimization by
    Simulated Annealing", Science, 1983
  • Idea
  • Apply any combinatorial optimization problem
  • TSP
  • VLSI CAD

2
Algorithm
init
perturb
evaluate
decide
cool down
update
end?
result
  • Generate a random configuration
  • while stop_criterion(i, T) false
  • for j ? 0 to N do
  • new_config ? perturb(config)
  • ?C ? eval(new_config, config)
  • if ?C lt 0 or accept(?C, T)
  • then config ? new_config
  • T ? schedule(i, T)
  • i ? i 1

3
In Actual Problem
  • Settings
  • Annealing schedule
  • Acceptance rate
  • Perturb method
  • Inner loop times
  • Evaluation method
  • Tuning
  • Important
  • Differ from problem to problem
  • Mostly empirical

4
Apply to Cell Placement
  • Most well-developed method
  • Very time consuming
  • Though polynomial time but
  • Much greater than O(nlogn)
  • Excellent results

5
Implementations
  • TimberWolf
  • Developed by Carl Sechen and Sangiovanni-Vincentel
    li
  • www.twolf.com/
  • TimberWolf 7 ? iTools 1.4.0
  • Alliance
  • www-asim.lip6.fr/alliance/
  • Ocean
  • cas.et.tudelft.nl/software/ocean/
  • Electric
  • www.gnu.org/software/electric/electric.html

6
Parallelization
  • Serial in nature?
  • Almost
  • Move acceleration
  • Pipelining indeed
  • Shared memory architecture only
  • Limited parallelism
  • Parallel moves
  • Moves may interact to each other

7
Parallel Approaches
  • Evaluate non-interacting moves in parallel
  • Preserves the convergence
  • Difficult to identity
  • Evaluate all moves in parallel
  • Maximum scope for parallelism
  • Loss of quality
  • Multiple Markov chains
  • Near linear speed-up
  • Local minimum trap
  • Speculative computation
  • Not feasible for cell placement

8
References
  • 1 K. Shahookar and P. Mazumder, VLSI Cell
    Placement Techniques, ACM Computing Surveys,
    Volume 23, Issue 2, Pages 143-220, June 1991
  • 2 J. A. Chandy and P. Banerjee, Parallel
    Simulated Annealing Strategies for VLSI Cell
    Placement, Proceedings of the 9th International
    Conference on VLSI Design VLSI in Mobile
    Communication, Page 37, 1996
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