Advanced Digital Circuits ECET 146 Week 2

1
Advanced Digital CircuitsECET 146Week 2

• Professor Iskandar Hack
• ET 221G, 481-5733
• hack_at_ipfw.edu

2
Weeks Goals

• Downloading and Installing Alteras Max Plus II
  Software
• Acquiring License File and setting up License
• Introduction of Alteras Max Plus II Software
  including
• Entering Design into Design Software using
  Schematic Editor
• Compiling design to implement into an Altera
  CPLD
• Reviewing Report File to Determine
• Chip Utilization
• Pin outs
• Simulating Design

3
Downloading Alteras Max Plus II

• Go to Alteras University Download page at
  https//www.altera.com/support/software/download/a
  ltera_design/mp2_student/dnl-student.jsp
• Select student10.2.exe

4
Downloading Altera II

• Fill in the questionnaire and submit request

5
Downloading Altera III

• Select Save File when download dialog appears

6
Downloading Altera III

• Select a directory that you will remember to save
  the file to

7
Installing Altera

• Open the directory you saved the install file to
  in Windows Explorer and double click the install
  file

8
Installing Altera II

• Ignore the warning regarding license file (well
  license the software later) by hitting next

9
Installing Altera III

• Enter your name and either home or Purdue for
  when asked

10
Installing Altera IV

• Install all of the components for the first screen

11
Installing Altera V

• Unclick the tutorial on the next screen

12
Installing Altera VI

• Have Altera install into the default start menu
  folder

13
Installing Altera VII

• Wait for the install to finish

14
Acquiring License File

• Go to http//www.altera.com/support/licensing/lic-
  university.html and select version 10.2, then
  continue

15
Acquiring License File II

• Open a DOS window by selecting run and entering
  command as the program and hit OK

16
Acquiring License File III

• Get the ID for your C Drive by typing dir /p
• Note the 8-hex digit ID (7C31-865D in this case)

17
Acquiring License File IV

• Enter that ID on the form on the Web site and hit
  continue

18
Acquiring License File V

• Fill out the form on the next page and hit
  continue

19
Installing License File

• License File will be sent to you via email
• Save the file when it arrives to the max2plus
  directory by first clicking on it (note this
  could be different depending on your email
  software

20
Installing License File II
Select Save
21
Installing License File II

• Then browse to the max2plus directory and save
  the file by hitting save

22
Pointing Altera Software to the License File

• Open Altera Max II Plus Baseline software

23
Pointing Altera Software to the License File II

• Once the software is opened go to options and
  then license setup

24
Pointing Altera Software to the License File III

• Select Browse and go to the max2plus directory
  and select license.dat and hit OK

25
Pointing Altera Software to the License File IV

• If youve done this correctly you should see the
  following. Hit OK, and the software is ready

26
Entering Schematic Design

• Open the Altera Max Plus II Baseline Software
  and select the Graphic Editor

27
Entering Symbols

• Draw the schematic by double clicking and
  selecting the symbols to enter appropriate
  symbols

28
Entering Wires

• Draw wires by moving the cursor over the inputs
  or outputs of gates (or I/O pads) until a
  crosshair appears and draw with the left mouse
  button.

29
Exercise One

• Draw the following schematic

30
Renaming Pins

• Double Click on I/O pins show that they are
  highlighted and type in new name

31
Finish Drawing for Exercise One

• Rename all the pins as shown

32
Save Design

• Go to File and select save as and save design as
  Example1.gdf (note gdf graphical design file)
  on your flash or zip drive if in lab, or in your
  working directory otherwise.

33
Setting the Project

• Select the File Menu and set the Project to the
  current File. Note it is very important that the
  Project is set to the working file.

34
Verify the Project is correct

• After setting the project be sure that that the
  project name matches the file name.

Project Name
Current File being edited
35
Notes regarding Project Names

• The project name does NOT contain the .gdf
  extension
• Thus if there are more than one type of design
  file in the project such as wdf (waveform design
  files) or tdf (text design files) then the system
  will not know what file goes with the project
  name.
• Therefore you can NOT have a file named
  Example1.gdf and Example1.tdf in the same
  directory. This will cause MAJOR problems for the
  software.
• Later in the semester youll have projects with
  more than one file BEWARE of the names of the
  files, they must be unique.

36
Compiling the Project

• Select from the File menu Project, then Save
  and Compile

37
The Compiler

• If you did everything right thus far you should
  see something like this

38
Compiler Messages

• The compiler will tell you what device that it
  selected for the design and from what family.
  Note that will change this later to match the
  actual device on the development boards. But for
  now leave it as it is.

MAX7000 Family
EPM7032LC44-6 is the smallest device that the
design will fit into In this case that is the
smallest device in that family
39
Report File

• Look at the report file by clicking on the rpt
  icon in the compiler window

40
Pin Outs

• Look to see what pins your inputs and output are
  on in the report. Youll have to scroll down in
  the file to see the chip layout. Later well see
  out to set the pins to a particular location.

Output X
Inputs A, B, C and D
41
Drawing Waveforms for Simulation

• At this point close the compiler and graphic
  editor windows by clicking on the x in each
  window. Be careful not to close Altera.

Closes Altera (Dont Hit)
Closes Compiler and Compiler Messages
Closes Graphic Editor
42
Open Waveform Editor

• Open the waveform editor by selecting Altera Max
  Plus II and Waveform Editor

43
Selecting Nodes

• Select Nodes and Enter from SNF, this will bring
  up another dialog to select your nodes for
  simulation.

44
Selecting Nodes II
Start by clicking on List
Then move the I/O to the Right by clicking on
the gt Button
After theyre Selected hit OK
45
Check if all nodes are selected

• Verify in the waveform editor that all nodes are
  shown

Inputs
Output
46
Change Simulation Time

• In order to simulate 16 different input
  conditions youll need to change the end time to
  1.6 uS. Select End Time from the File Menu

47
Drawing Waveforms

• Hit the magnifying glass with the minus symbol to
  show the entire 1.6uS
• Select a portion of the waveform by moving the
  mouse over the section while holding down the
  left mouse button.
• Select either 0 or 1 on the left side of the
  screen.
• Note you can also hit the right mouse button to
  change the value of the waveform.

48
Drawing Waveforms II
49
Alternative Way to Draw Waveforms

• You can also group the inputs together and use
  the count function to draw the waveforms.
• In order to do this the MSB must be on top. Since
  we assume that A is the MSB, we must move the
  inputs by dragging them to the new location.
• Grab each input by the I symbol and move it to
  the new location.

50
Reordering Inputs
New order
Grab here to move
51
Grouping Inputs

• Select all the inputs, right click, hit Enter
  Group and use IN for the name of the inputs

Notice all four inputs Are shown as one
52
Using Count Function

• Select the Group IN and then hit the count
  button on the left side of the screen. Take the
  defaults (start at 0, incr by 1, mult by 1)

Count Dialog
53
Display after Count

• You should see the following after hitting OK

54
Ungrouping

• It is not necessary to ungroup, but if you want
  to verify that the waveforms (other than the
  order being changed) are the same you can select
  the group, right click and hit ungroup.

55
Ungrouped Display
56
Save Simulation File

• Up to now you should have seen that the output is
  neither high or low. That is because it has not
  been simulated yet.
• In order to simulate you must first save the file
  as Example1.scf (scf simulation channel file)

57
Simulate

• This is the easy part Hit the simulate button
  on the top of the screen.

Simulate
58
Verify Simulation

• You should have a value for the output for each
  input condition.
• Manually determine (using techniques from ECET
  111) what the output should be for each condition
  and verify that the output matches that.

59
Simulation Display Ungrouped
60
Simulation Display - Grouped
61
Assignment One

• Using techniques from ECET 111 design a circuit
  (no need to minimize) for the following Boolean
  expression.
• Manually draw up truth table for the equation
• Enter the design into the Altera Software and
  simulate the design
• Youll need to use the following symbols
• NOT
• AND2
• OR2
• INPUT
• OUTPUT
• Compare the truth table to the simulation
• Turn in hand drawn schematic, truth table, print
  out of the schematic from Altera, and a copy of
  the simulation.