Development of a TCPIP Processing Hardware

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Development of a TCP/IP Processing Hardware

• 1,2) Tomohisa Uchida and 2)Manobu Tanaka
• 1) University of Tokyo, Japan
• 2) High Energy Accelerator Research Organization
  (KEK), Japan

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Outline

• Introduction
• Advantages using network technologies
• Why we did develop?
• Implementation
• A test board.
• Measurement
• Transfer Speed.
• Power Consumption.
• Conclusion

We call the hardware SiTCP.
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Introduction

• There are advantages using Network technologies.
• High Flexibility,
• High Connectivity,
• Various Commodity Products,
• Standard OSs Support Standard Protocols,
• Easy Maintenance.
• It is essential in back-end systems

It has not been sufficiently adopted in
front-end systems.
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Why did we develop ?
We Tried to adopt it but Encountered Problems.

• Front-end devices have constraints
• Small Hardware size,
• Low Power-Consumption,
• High Speed Data-Transfer.

In Order to Satisfy These Constraints, We Have
Developed SiTCP.
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Features

• Small Hardware size
• Implemented on an FPGA
• Small Power Consumption
• lt 730mW
• System Clock is 25MHz with 100BAST-T.
• High Transfer-Speed
• Line Utilization of TCP data is about 95.
• Reach to The Theoretical Limit.
• Simple External Interface
• Like a Sync. FIFO-Memory-device.

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Implementation
In order to measure performance, We developed a
Test board.
Ethernet PHY SMSC LAN83C185
FPGA
SiTCP on It
Xilinx XC3S500E
RJ45
2,000 Slices (40 logic resources) are used
Test Board
Small Size
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Block Diagram of the FPGA
SiTCP
Test-Data Generator
Tx data
MII
Test-Data Checker
Rx data
Test data are incremental numbers.
MII (Media Independent Interface) is specified
by IEEE802.3.
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Measurement

• Confirmed capability to communicate a PC
• Using a Linux OS.
• With a Simple Application Program
• Using Standard SOCKT() functions
• Receiving only
• Measured Transfer Speed
• From a SiTCP (Test board) to a PC

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MeasurementSetup
ACK Logger
ACK Extractor
RS232C
Extracts TCP ACK s from packets
Send The Last TCP ACK Every 200 ms
A Packet is copied and Forwarded to The
Extractor.
Tap
Generates Test Data
RX-PC
100BASE-T
LINUX 2.4
Test Board
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Calculate Line Utilization

• Transfer Speed
• Calculate from logged ACK s
• ACK is logged every 200 ms.
• Utilization Ratio
• Transfer-Speed / 100 Mbps
• (100BASE-T is employed)

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Result
Reaches The Theoretical Limit
Theoretical Limit
Utilization Ratio ()
Power Consumption lt 730 mW (The whole board)
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Conclusion
We have developed the TCP/IP processing hardware
(SiTCP).

• Enough Performance for Front-end Devices
• High-Speed Data Transfers
• 95 (Line Utilization of TCP data)
• Small Hardware Size
• 41 logic resources are used of XC3S500E
• Low Power Consumption
• lt 730 mW (The Whole Board)

SiTCP enables Front-end devices to adopt
Network-technologies.
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Supplemental Slides
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Sequence Number
All Data of TCP are numbered by a sender.
Data
SN2015
Data
SN2016
A TCP packet
Data
SN2017
Sending Order
Data
SN2018
Data
The sender sent a SN of first data.
SN2019
Data
SN3050
SN3051
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Acknowledge Number
Data
SN2015
The Receiver is Expecting
Data
SN2016
A TCP packet
Data
SN2017
Receiving Order
Check the SN.
Data
SN2018
Data
SN2019
The Receiver sent back the expecting next SN As
ACK .
Data
SN3050
ACK 3051
SN3051
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MeasurementSetup
ACK Logger
ACK Extractor
RS232C
Extract TCP ACK s from RX-PC packets
Send a TCP ACK Every 200 ms
A Packet is copied and Forwarded to The
Extractor.
Tap
Generates Test Data
RX-PC
100BASE-T
LINUX 2.4
Test Board
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Transfer Capability TestTransfer Rates of Both
Directions

• Measured Transfer Speed
• Between SiTCPs
• Both directions
• Simultaneously

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Capability TestTransfer Data of Both Directions
ACK Logger
RS232C
ACK Extractor
X 2
Ethernet Tap
100BASE-T
TCP Server
TCP Client
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Line Utilization between SiTCPs
Avg. Utilization 95 (95 Mbps)
Stable
Server? Client
Client ? Server
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Comparison toA Standard Implementation

• An Standard Implementation
• Using an FPGA
• Protocols are processed
• on an FPGA,
• Using an Embedded CPU,
• With a Standard OS
• Linux
• SUZAKU board
• One of the standard implementations.

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SUZAKU board

• A Product of Atmark Techno Inc. ,Japan
• FPGA
• XC3S1000 (Xilinx Inc.)
• CPU
• Microblaze, Xilinx Inc.
• Embedded in an FPGA
• uClinux

Consists of an FPGA, an Ethernet Controller
chip, a Flash Memory, a DRAM.
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Setup
ACK Logger
ACK Extractor
RS232C
Ethernet Hub
Ethernet Tap
100BASE-T
RX PC
SUZAKU board
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Utilization Ratio
Max. Utilization 3
Utilization Ratio ()