Decompression After The Cache For Compressed Code Execution

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Decompression After The Cache For Compressed Code
Execution

• By
• Yujia Jin
• Rong Chen

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Overall Picture
Instruction ROM
I
cpu
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Overall Picture
Instruction ROM
I
cpu

decomp
decomp
CLB
LAT
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Pipeline
IF
IF
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Traditional Compression Algorithm

• Break program into n instructions blocks,
  compress each block serially at byte level.
• Problems
• 8 byte instruction ? 8 cycle to decompress a
  single instruction.

• Not true random access.
• Jump from block x to the nth instruction in block
  y will require the first n-1 instruction be
  decompressed.

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Compression Algorithm
Use LAT to keep track if the instruction is
compressed
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Result
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Result
ijpeg in spec95
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Branch Compensation Cache

• Problems of branch instructions
• Whenever encounter a branch instruction, the
  pipeline has to waste 3 stages

Find out its a jump, has to wait here
IF
DEC
BUB
BUB
BUB
CLB
BUB
IF
BUB
BUB
BUB
BUB
CLB
BUB
BUB
BUB
BUB
BUB
BUB
CLB
BUB
Restart a new pipeline and proceed until
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Branch Compensation Cache

• Solutions
• Add a branch compensation cache (BCC), try to
  pre-store the target instructions. When encounter
  a PC jump, go to check if the target instruction
  is there.

yes
IE
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Branch Compensation Cache

• Results
• The branch compensation cache behaves like the
  ordinary cache.

ijpeg in spec95
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Result
ijpeg in spec95
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Conclusion

• Our approach can increase instruction cache hit
  rate. This may translate to instruction cache
  area saving.
• - Our current compression algorithm provides true
  random access at the cost of lower compression
  rate.
• possible improvements
• provide optimal table entries.
• provide multiple levels of tables.