TTL Logic and Design Considerations

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TTL Logic and Design Considerations
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The Basics
Device Prefixes
74 series - commercial
54 series - military specification

• Operates over wider temperature range

• Operates over wider voltage range

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The Basics
Will a 54LSxx perform better than a 74LSxx?
Not Necessarily. In many cases the74 series
component performs betterthan the 54 series
component.
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The Basics
Noise Margin
Output
Input
5.0 V
5.0 V
HIGH
HIGH
noise margin
2.4 V
2.0 V
0.8 V
0.4 V
LOW
LOW
0.0 V
0.0 V
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Unused TTL Inputs
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Unused TTL Inputs

• Unconnected input acts like logical high
• Can pick up noise
• NEVER DO THIS

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Unused TTL Inputs
Will this work?
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Unused TTL Inputs

• OK but two inputs must be driven
• This will affect fanout

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Unused TTL Inputs
Resistor provides current protection in case of
power spikes
note On gates requiring a logical low
input connect directly to ground
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Unused TTL Inputs
What do you do with unused gates?
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Unused TTL Inputs
Connection not necessary if gate not used
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TTL Design Considerations
1. Never leave unused inputs unconnected
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TTL Design Considerations

• 1. Never leave unused inputs unconnected
• 2. Install decoupling capacitors
• 0.1m F or 0.01m F for each IC
• 25m F to 100m F for power supply

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TTL Design Considerations

• 1. Never leave unused inputs unconnected
• 2. Install decoupling capacitors
• 0.1m F or 0.01m F for each IC
• 25m F to 100m F for power supply
• 3. Never exceed an outputs drive capability

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TTL Design Considerations

• 1. Never leave unused inputs unconnected
• 2. Install decoupling capacitors
• 0.1m F or 0.01m F for each IC
• 25m F to 100m F for power supply
• 3. Never exceed an outputs drive capability
• 4. Never connect standard outputs together

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TTL Design Considerations

• 1. Never leave unused inputs unconnected
• 2. Install decoupling capacitors
• 0.1m F or 0.01m F for each IC
• 25m F to 100m F for power supply
• 3. Never exceed an outputs drive capability
• 4. Never connect standard outputs together
• 5. Always design for worst case

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CMOS Logic and Design Considerations
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CMOS Basics

• CMOS stands for Complementary Metal-Oxide
  Semiconductors
• Utilizes MOS transistors
• MOS transistors come in two varieties

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CMOS Inverter
Note CMOS requires no resistors for current
limiting. This makes CMOS attractive for
high levels of integration
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Logic Levels and Noise Margin
Output
Input
5.0 V
5.0 V
HIGH
4.9 V
HIGH
noise margin
3.5 V
1.5 V
noise margin
LOW
0.1 V
LOW
0.0 V
0.0 V
Note Typical values for VCC of 5 V
(varies for different VCC)
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CMOS Handling

• CMOS is extremely static sensitive
• Some protection built into ICs
• Handle as follows

• Touch source of GND before handling
• Transport in conductive foam
• Be especially careful on DRY days

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CMOS Subfamilies

• 4000 series - first successful series
• HC series - high speed CMOS faster,
  more sink/source VCC 2 - 6 V
• HCT series - high-speed CMOS, TTL
  compatible same as HC with TTL inputs
  VCC 5 V
• AC series - advanced CMOS faster, more
  sink/source than HC VCC 2 - 6 V
• ACT series - advanced CMOS same as AC
  with TTL inputs VCC 5 V

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Unused CMOS Inputs
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CMOS Design Considerations
1. Tie unused inputs to VCC or GND directly
NEVER LEAVE UNCONNECTED 2. Install decoupling
capacitors 0.1 uF or 0.01 uF for
each IC 25 uF to 100 uF for power
supply 3. Never exceed an outputs drive
capability 4. Never connect standard outputs
together 5. Always design for worst case
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CMOS/TTL Interfacing
TTL-to-CMOS
Rp
VCC
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(Vcc - V OL(min) ) Rp

( IOL(TTL)
nIIL(CMOS) ) where n is the number of
CMOS inputs being driven other specs found
in the components datasheet
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CMOS/TTL Interfacing
CMOS-to-TTL

• Can connect directly if current drive
  capability is high enough
• When in doubt use CMOS buffer

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CMOS Output Configurations

• Standard Output

• Open-Drain Output

• Three-State Output

Note Similar to TTL except MOSFET
transistors instead of bipolar (BJT)