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ECAL electronics

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The active part is inserted in a supporting structure which connects ECAL to ISS ... ECAL Intermediate Board (EIB) - version 1 ... – PowerPoint PPT presentation

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Title: ECAL electronics


1
ECAL electronics
  • Marco Incagli - INFN Pisa
  • AMS TIM - CERN 20 jan 2004

2
ECAL electronics general view
ECAL crate
ECAL Intermediate Board (EIB)
EPSFE
PMTFEE
ETRG
JINF
EDR
HV
LV
ANALOG (on ECAL)
POWER SUPPLY
3
0 - Introduction on ECAL
g
e, p ?
  • e/p discrimination at 10-3 level, using ECAL
    standalone, and 10-4 level, using E-p matching
  • Detection of non-interacting photons (75)
  • Trigger on photons and on e which deposit energy
    in Veto Counters

4
ECAL structure
e?
  • Sampling calorimeter with lead foils and
    scintillating fibers
  • 9 superlayers with alternating x and y readout
  • Total thickness is 166mm, corresponding to 17.2
    X0
  • Total weight 638 kg

Lead foil (1mm)
Fibers (?1mm)
z
particle direction
18.5mm
y
x
5
Supporting structure and readout
  • The active part is inserted in a supporting
    structure which connects ECAL to ISS
  • Light is readout with PMTs connected to fibers
    through light guides
  • PMTs have 4 active cahodes 9?9 mm2
  • Total of 324 PMTs , 1296 readout cells

y
x
z
18.5 mm
6
1 - electronics on ECAL
EIB
EFEE
7
ECAL Front End Electronics (EFEE)
  • Design and test of front end board is finished
  • 5 EFEEs arrived at LAPP mid january
  • The High Voltage cable is soldered on the EFEE
    side, and then cut at the right length before
    applying the connector this job cannot be done
    until the final position of the HV bricks is
    decided
  • Last week (12 jan 04) brick position has been
    fixed, except for few final checks the EFEE
    production can proceed
  • First batch of 60 will arrive to LAPP beg of
    march for potting and testing

8
ECAL Intermediate Board (EIB) - version 1
To Ecrate
9 PMTs
  • Receives signal from 9 PMTs and sends it to EDR
    in LVDS format
  • Provides low voltage to EFEE
  • Compares dynode signal to a variable threshold
    and sends information to trigger card (analog
    trigger)
  • Version 1 built and tested at Terni (except for
    trigger)

9
EIB - trigger
  • First tests of the trigger sector of EIB
    performed at LAPP see results at
    http//pi.infn.it/ams/emc
  • We expect to have a working scheme before summer

To ETRG board
10
2 - ECAL crate
EPSFE
ETRG
JINF
EDR
1
2
3(?)
1
2
3
4
5
6
1
1
Responsability of ECAL Standard AMS
11
EDR ECAL Data Reduction
  • Function
  • Receives data from EIB
  • Sends commands and LV to EIB
  • Performs pedestal subtraction and zero
    suppression ( data reduction)
  • Send data to JINF
  • Board status
  • PCB completed needs only final decision on
    cables and connectors to produce QM
  • Milestones
  • QM ready before summer
  • To be used in Test Beam of Sep 2004

EIB ? 3
controls LV
data
EDR
JINF
backplane
cable
12
ETRG ECAL standalone TRiGger
  • Function
  • Receives data from 12 EIB
  • Run trigger algorithm
  • Send trigger pattern to JINF
  • Send trigger signal to JLV1
  • Board status
  • schematics completed needs final decision on
    cables and connectors to start work on PCB
  • Milestones
  • EM ready before september
  • To be used in Test Beam of Sep 2004

EIB ? 12
data from last dynode
ETRG
JINF
JLV1
backplane
cable
13
EPSFE Power Supply for Front End
  • Function
  • Send Low Voltage to EIB acting as a controlled
    fuse (Solid State Fuse - SSF)
  • Slow control for EDR and ETRG
  • Board status
  • Test of single positive SSF to measure voltage
    drop
  • Milestones
  • Design PCB single SSF, and replicate it to see if
    we need 2 or 3 boards, within summer
  • Start working on PCB after summer

JINF
LV
Le Croy control bus
3.8V -2.8V
EPSFE
EDR
ETRG
3.5V -2.5V
EIB
backplane
cable
14
Backplane
  • Function
  • Communication among boards
  • Board status
  • Nothing has been done ? wait until all boards
    have been designed
  • Milestones
  • Contact company (CAEN) for price and schedule
  • Start defining details after summer 2004

EDR,EPSFE JINF,ETRG
backplane
EDR,EPSFE JINF,ETRG
backplane
cable
15
3 - Power supply
LV (?2)
HV (?2)
S9053
S9057
S9057
S9057
BRICK
BRICK
BRICK
Ecrate,BRICK
EIB,EFEE
16
Power supply High Voltage Brick
  • Current status 1 prototype built (mechanics for
    one of the two elevators is still missing)

Control board
ELEVATOR
Linear regulators
17
Brick new proposal
  • For weight saving it has been proposed to locate
    the bricks on the oblique beams

ECAL BRICKS
E-crate
RICH BRICKS
E-crate
18
Brick modifications due to new location
  • Mechanics
  • The brick is self-consistent no crate is
    necessary
  • The card-locks have to be removed and some simple
    supports have to be added
  • The control board side is not covered a wall is
    necessary
  • Electronics
  • The VME like connector must be replaced by a
    front panel connector
  • Money/time needed for the modifications? Not a
    major issue

19
Power Supply and Slow Control
Redundant scheme with HOT and COLD lines
20
Summary
  • Final decision on Ecrate Brick location are
    urgent to finalize the details and start
    production of EFEE ? it seems that the location
    on oblique beams satisfies all requirements
    (thermal, safety, weigt saving, )
  • Decision on cables and connectors must be taken
    as soon as possible
  • Most of the relevant ECAL boards (EIB with analog
    part of the trigger, EDR, ETRG) will be tested in
    the Test Beam of Sep 2004
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