XESS XSV Board

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XESS XSV Board
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HW Diagram
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USB Signalling
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XSV Board Project Interfaces
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Trenz USB Macro
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VHDL Functional Diagram
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Configuration and Dataflow Processes
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Host Software Operation, Referenced Files and
Modified Project Information

• Modified Project
• Integrate your RISC design into the embedded
  project by using xsvFunc.vhd as a wrapper for
  your design.
• Synthesize xsvPads and implement (create a bit
  stream) using the given ucf and usbMacro EDIF
  files in Xilinx ISE Alliance.
• Download configuration file bitstream into XSV
  board using XSTOOLs (E218)
• Using hidTest on the PC (in E218), write the
  32-bit instructions followed by two 16-bit
  multiplicands (the upper byte of each is 0x00)
  and read the 16-bit result

• kahuna.sdsu.edu/harris
• Website will have links to
• VHDL
• Macro (EDIF gt 1MB)
• ucf File
• Host Controller S/W Source Code
• XSV Manual, Trenz USB, SIE, M51 pdfs