Very Fast Chip-level Thermal Analysis

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Very Fast Chip-level Thermal Analysis
Budapest, Hungary, 17-19 September 2007

• Keiji Nakabayashi, Tamiyo Nakabayashi, and
  Kazuo Nakajima
• Graduate School of Information Science, Nara
  Institute of Science and Technology
• Keihanna Science City, Nara, Japan,
  keiji-n_at_is.naist.jp
• Graduate School of Humanities and Sciences, Nara
  Womens University
• Kitauoyahigashi-machi, Nara, Japan,
  nakaba_at_ics.nara-wu.ac.jp
• Dept. of Electrical and Computer Engineering,
  University of Maryland
• College Park, MD 20742, USA, nakajima_at_umd.edu

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Abstarct
We present a new technique of VLSI chip-level
thermal analysis. We extend a newly developed
method of solving two dimensional Laplace
equations to thermal analysis of four adjacent
materials on a mother board. We implement our
technique in C and compare its performance to
that of a commercial CAD tool. Our experimental
results show that our program runs 5.8 and 8.9
times faster while keeping smaller residuals by 5
and 1 order of magnitude, respectively.
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1. Introduction

• Thermal phenomena is very important factor in
  VLSI and board design in the post-90 nm era.
• Thermal analysis is modeling of thermal
  conduction by a Laplace equation and its solution
  by finite difference method (FDM).
• We developed a new, very fast chip-level thermal
  analysis technique.

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2. Problem

• Consider a multi-layer structure, where four
  layers of materials p, q, r, and s of thermal
  conductivities kp, kq, kr, and ks, respectively,
  are stacked together.
• Heat travels through a heat transfer pass
  consisting of the chip die, the adhesive, the
  heat spreader, and the heat sink, and goes out to
  the ambient air.
• Our problem is to find temperature distribution
  through two dimensional steady-state thermal
  conduction analysis.

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3. Method

• Recently, a new efficient direct method, called
  Symbolic Partial Solution Method (S-PSM) was
  developed in the area of computational fluid
  dynamics.
• S-PSM-based solution process goes through many
  levels of repeated operations of decomposition
  and merging.
• We extend this S-PSM-based Laplace equation
  solver to a multi-layer structure.

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Boundary Value Problem (BVP)
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The arrangement of interior grid and boundary
points
for the four material domains.
kp
kq
kr
ks
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Laplace Equation and Finite Difference Method for
each material u (p, q, r, s)
Finite Difference Method
Final Solution for each material
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thermal conductivity of the boundary between
adjacent materials
From the viewpoint of material q, the following
difference equation holds at its boundary with
material p (first order approximation)
Similarly, at its boundary with material r,
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matrix-vectors form of equations for four
materials (three boundaries)
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(No Transcript)
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System Decomposition and Partial Solutions for
Each Subsystem/Material
(3-20)
(3-21)
Decomposition
(3-22)
(3-23)
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(3-24)
(3-25)
Partial solution
(3-26)
(3-27)
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(3-28)
Merge
(3-29)
where
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(3-31)
Partial solution
(3-32)
Merge
(3-33)
Final solution
(3-35)
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Temperature distributions of steady-state heat
conduction for four layers of materials our
program vs. commercial tool Raphael
Our Program Solver S-PSM
Raphael 7 Solver Iteration method
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4. Results and Discussion

• Table I shows the CPU times required and the
  residuals produced by our program and Raphael.
• The results demonstrate that for the largest
  grid, our program ran 5.8 and 8.9 times faster
  while keeping smaller residuals by 5 and 1 order
  of magnitudes, than Raphael 7

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5. Conclusions

• We have proposed a new technique of solving two
  dimensional Laplace equations to thermal analysis
  for multi-layer VLSI chips.
• Our program is superior to a commercial CAD tool,
  Raphael (iteration method) 7.
• Further Work extension to Poisson equation
  (heat generation), three dimensional, transient
  heat conduction analysis, and the case of complex
  shapes and boundary conditions of materials.