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Lecture 6: Instruction Set Architecture

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Lecture 6: Instruction Set Architecture. Computer Engineering 585. Fall 2001 ... endwhile endif endfor. eval C eval C I=x. Br C, N Br C, N Br I==y, N ... – PowerPoint PPT presentation

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Title: Lecture 6: Instruction Set Architecture


1
Lecture 6 Instruction Set Architecture
  • Computer Engineering 585
  • Fall 2001

2
Costs of misalignment
Word at addr 2
3
Data Alignment Network
Internal bus/reg file
memory port
4
Addressing Modes
Addr mode
Meaning
Example inst
RR4 RR4 RR3
Register
Add R4,R3
Immediate
RR4

RR43
constants.
Add R4,3

Displacement
Add R4,100(R1)
RR4 RR4 M100RR1
local var.
Reg deferred
pointer
RR4 RR4 MRR1
Add R4,(R1)
Indexed
Add R3,(R1 R2)
RR3 RR3 MRR1RR2
Add R1,(1001)
RR1 RR1 M1001
Direct
static data
Mem indirect
Add R1,_at_(R3)
RR1 RR1MMRR3
p
.
RR1 RR1MRR2 RR2 RR2 d
Array access
Add R1,(R2)
Autoincrement
.
Auto-
RR2 RR2- d RR1 RR1MRR2
Add R1,-(R2)
decrement
RR1 RR1 M100RR2 RR3 d
Add
index arrays
Scaled
R1,100(R2)R3
5
Addressing Modes Design Issues
  • an appropriate choice leads to compact
    code.e.g. where a
  • small constant is needed, keep it in a memory
    location and then
  • load it into a register vs the use of
    immediate addr mode.
  • should choose the sizes of various addr mode
    fields judiciously.
  • e.g. a 32-bit immediate loses all its
    advantages!
  • program-mix should be used to dictate these
    decisions
  • addr modes which addr modes should be
    supported?
  • displacement size how large a displacement
    should be
  • allowed?
  • immediate size how large an immediate value
    should be
  • allowed?
  • Some are architecture independent (immediate
    size distribution)
  • while some are architecture/compiler dependent
    (use of
  • different addressing modes).

6
Addressing Modes Usage
Register mode 50, Displacement 8, 16, 32-bits,
on a VAX
7
Displacement Distribution
MIPS, avg of SPEC92, majority of 14 bits ve, 1
above 15 bits
8
Immediates vs Inst. class
DLX constant shifts-ALU, compare-0 included
9
Immediates Distribution
Vax 6 lt -ve 50-70 -- 8bits 75-80 -- 16bits
10
Addressing Modes Summary
  • 50 Register 22 Displacement 17 Immediate
    6.3 Register indirect 3.6 scaled.
  • Displacement 12-bits capture 75 16-bits
    capture 99 of displacements.
  • Immediates 8-bits capture 50 16-bits capture
    80 of immediate values.

11
Instruction Set Operations
Operator type
Examples
Arithmetic and logical
Int arith logical operations add, and,
subtract, or
Data transfer
Loads-stores (move instructions)
Branch, jump, procedure call and return, traps
Control
System
Operating system call, virtual memory management
instructions
Floating-point operations add, multiply
Floating point
Decimal
Decimal add, decimal multiply, decimal-to-characte
r conversions
String
String move, string compare, string search
Graphics
Pixel operations, compression/decompression
operations
12
Instruction Set Operations
  • Which operations should be supported?
  • How should the operations of a given class be
    encoded, say ALU operations?
  • Again, program-mix should be used to dictate
    these decisions

13
Instruction-Mix X86
14
Control Flow Instructions
  • Cond. Branches, jumps, procedure call/return
  • Branch instruction
  • while C do if C then for Ix to y do
  • endwhile endif endfor
  • eval C eval C Ix
  • Br C, N Br C, N Br Iy, N
  • PC-relative Branches PCN
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