A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology

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A Data-Driven Statistical Approach to Analyzing
Process Variation in 65nm SOI Technology
ISQED 2007, San Jose, Mar 28, 2007

• Choongyeun Cho1, Daeik Kim1, Jonghae Kim1,
  Jean-Olivier Plouchart1, Daihyun Lim2, Sangyeun
  Cho3, and Robert Trzcinski1

1IBM, 2MIT, 3U. of Pittsburgh
Final
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Outline

• Introduction
• Motivation of this work
• Constrained Principal Component Analysis
• Proposed method
• Experiments
• Using 65nm SOI technology
• Conclusion
• Applications, future work
• Contributions

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Motivation

• Process variation (PV) limits performance/yield
  of an IC.
• PV is hard to model or predict.
• Many factors of different nature contribute to
  PV.
• Physical modeling is often intractable.
• Four ranges of PV

Within-die
Die-to-Die
Wafer-to-Wafer
Lot-to-Lot
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Motivation

• We present an efficient method to decompose PV
  into D2D and W2W components.
• Use existing manufacturing in-line data only.
• No model!

Within-die
Die-to-Die
Wafer-to-Wafer
Lot-to-Lot
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What is In-line Data?

• In this work, in-line data refers to
• Electrical measurements in manufacturing line for
  various purposes fault diagnosis, device dc
  characterization, and model-hardware correlation.
  Test structures include FETs, ring oscillators,
  SRAM, etc.
• Thus, available early in the manufacturing stage.
• Key PV parameters (VT, LPOLY, TOX, etc) are
  embedded in well chosen in-line data, yet in a
  complex manner especially for nanometer
  technologies.
• We exploit statistics of in-line data to analyze
  and extract D2D and W2W variations separately.

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Principal Component Analysis

• Principal Component Analysis (PCA) rotates
  coordinates such that resulting vector is
• Uncorrelated, and
• Ordered in terms of statistical variance.
• Can be defined recursively

y
PC2
PC1
x
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Constrained PCA

• Constrained PCA (CPCA) same as PCA except PCs
  are constrained to a pre-defined subspace.
• In this work, constraint is that every PC must
  align with D2D or W2W variation direction.

D2D
D2D
W2W
W2W
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Proposed Algorithm
In-line data

• Can generalize for within-die and lot-to-lot
  variations.
• Implemented with lt100 lines of Matlab code.

Standardize
Screen data
Find first PC for D2D variation
Find first PC for W2W variation
Take PC with larger variance
Subtract this PC space from original data
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Case I 65nm SOI Tech

• 65nm SOI CMOS data (300mm wafer)
• 1109 in-line parameters used
• 40 dies/wafer,13 wafers 520 samples.
• The run for whole data took lt1min on an ordinary
  PC.

Test structures FET RO SRAM Capacitors Total
Before screen 1988 248 398 222 2856
After screen 759 83 159 108 1109
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Case I 65nm SOI Tech

PCA
0.8
?
0.7
Die-Wafer Interaction
Constrained PCA
0.6
D2D
CPC Index Type Variance explained Cumulative Variance explained
1 D2D 31.0 31.0
2 W2W 25.2 56.2
3 D2D 4.5 60.7
4 W2W 4.2 64.9
Cumulative norm. variance explained
W2W
0.5
0.4
0.3
D2D
0.2

1
5
10
15
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PC/CPC Index
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Case I 65nm SOI Tech
D2D variation (1st CPC) (Fitted with 2nd order
polynomials on the 40 available samples)
W2W variations (2nd,4th,5th CPCs)
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Case II Applied to RF Circuit

• This example shows how RF circuit variation can
  be expressed with device-level variation.
• RF self-oscillation frequencies (Fosc) for a
  static CML frequency divider

Fosc
Die index
Wafer index
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Reconstruction 1
Fosc
Die index
Wafer index
Offset
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Reconstruction 2
Fosc
Die index
Wafer index
Offset CPC1 (D2D)
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Reconstruction 3
Fosc
Die index
Wafer index
Offset CPC1 CPC2 (W2W)
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Reconstruction 4
Fosc
Die index
Wafer index
Offset CPC1 CPC2 CPC3 (D2D)
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Reconstruction 5
Fosc
Die index
Wafer index
Offset CPC1 CPC2 CPC3 CPC4 (W2W)
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Reconstruction Original

• PVs obtained from in-line measurement explain
  significant portion (66) of PV existing in
  complex RF circuit.

Fosc
Die index
Wafer index
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Case III Technology Monitoring

• Dominant D2D variations obtained for three
  successive 65nm SOI tech iterations.
• Visualize how technology stabilizes.

Iteration 1 (Pre-production)
Iteration 2
Iteration 3
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Application / Future Work

• Technology snapshot Use D2D variation to monitor
  characteristic of a lot or technology iterations.
• Intelligent sampling D2D variation signature
  serves as a guideline to pick representative
  chips for sampled tests.
• Future work includes
• Incorporate within-die and lot-to-lot variations.
• Model-assisted constrained PC.

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Conclusion

• Presented a statistical method to separate
  die-to-die and wafer-to-wafer variations using
  PCA variant
• Allows visualization and analysis of systematic
  variations.
• Rapid feedback to tech development.
• Quantified how much RF circuit performance is
  tied to device PVs.

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Thanks!Q A