Chapter 9: Memory Management - PowerPoint PPT Presentation

1 / 24
About This Presentation
Title:

Chapter 9: Memory Management

Description:

... into a single area of RAM. O/S divides user memory up into partitions ... access requires a page table look up, to retrieve frame number for ... area, code ... – PowerPoint PPT presentation

Number of Views:21
Avg rating:3.0/5.0
Slides: 25
Provided by: dUmn
Category:
Tags: area | chapter | code | look | management | memory | up

less

Transcript and Presenter's Notes

Title: Chapter 9: Memory Management


1
Chapter 9 Memory Management
  • Memory addressing Physical vs. Logical
  • How much of a process to keep in memory
  • All?
  • Part?
  • What are the parts?
  • When should these parts be loaded, unloaded?
  • Swapping Contiguous allocation
  • Paging
  • Segmentation

2
Types of Addresses
  • Symbolic addresses
  • e.g., variable names
  • Absolute addresses
  • Code that must run at a specific position (e.g.,
    starting address) in computer memory
  • Specific addresses generated, e.g., by compiler
  • Addresses generated relative to start of physical
    memory (0 is first byte of RAM)
  • Relocatable addresses
  • Can be bound to specific addresses, after compile
    time
  • Addresses generated relative to start of program,
    not to start of physical memory (0 is first byte
    of program)

3
Address Spaces
  • Logical (a.k.a. virtual)
  • Addresses manipulated by a program
  • Define the logical address space
  • Physical
  • Addresses of physical hardware memory
  • Conversion from logical to physical
  • By memory management unit (MMU) of the CPU
    hardware

4
Address Binding
  • Definition
  • When the address used in a program gets converted
    to an actual physical RAM address
  • Address binding time
  • During compilation
  • But, generally dont know where program will be
    loaded when it is compiled
  • During load time
  • In order for a program to be initially loaded,
    decisions must be made about where it will
    execute in computer memory, so at least initial
    specific addresses must be bound
  • During execution
  • We may want to move a program, during execution,
    from one region of memory to another
  • Addresses will have to be re-bound

5
Programs in Memory
  • So far, mostly assuming all of a program in
    memory at one time
  • What is the limitation of this?

6
Issues
  • Is all of a program loaded into memory at once?
  • If we load program in parts, when are the parts
    loaded into memory?
  • How do we divide program into parts?
  • Does the program always stay in memory once
    loaded?
  • Unloaded only when it terminates?

7
Other Issues
  • Is memory is allocated contiguously?
  • A single sequence of addresses
  • Or multiple separated sequences of addresses
  • How do we deal with memory protection?
  • When a program tries to access code/data outside
    of its address space, we need to trap this

8
Methods of Program Loading
  • Static
  • All of a program is loaded into memory at once
  • Dynamic
  • Loading routine not loaded until called
  • Not operating system dependent
  • Linking libraries are loaded on an as needed
    basis
  • E.g., not all executable programs need to have
    statically linked copies of the standard I/O
    libraries
  • Needs operating system support linking of
    symbols occurs at run time
  • Can be tied into a versioning system
  • Overlays
  • A program is divided by the programmer into
    multiple components or overlays
  • load overlay code/data to use it need overlay
    driver

9
Swapping
  • A running process needs to be in main memory
    (RAM)
  • A process in other states (e.g., blocked,
    waiting) may be saved out to disc
  • E.g., if it will be waiting a relatively long
    time, and RAM memory is scarce
  • Swap out/swap in
  • Relocatable code is useful
  • If program uses absolute addresses, need to swap
    back into same memory area
  • Swapping is slow!
  • Use separate, fast discs
  • Pending I/O must be saved in O/S buffers for a
    swapped process

10
Contiguous Memory Allocation
  • Assume for now
  • All of the program loaded at once
  • Contiguous memory allocation
  • All of program loaded into a single area of RAM
  • O/S divides user memory up into partitions
  • Keeps a table of these partitions
  • One process per partition
  • Partition methods
  • Fixed size partitions
  • Static limit on degree of multiprogramming
  • Variable size partitions

11
Variable Size Partition Issues
  • Dynamic memory allocation
  • O/S table with start, end of allocated
    partitions, and unallocated partitions
  • Unallocated partitions are holes
  • When memory returned, merge with neighboring hole
  • Allocation of a new partition of size n
  • First fit, Best fit, Worst fit
  • First fit may be better faster, similar to best
    fit
  • Fragmentation
  • External
  • Free blocks of memory too small to be used
  • Compaction can be used need relocatable code
  • Internal
  • Allocating partitions larger than requested
    unused space in partition for a process (more
    typ. with fixed sized partitions)

12
Paging
  • Non-contiguous memory allocation
  • Memory divided into small physical frames
  • fixed size blocks, e.g., 1024 bytes
  • Process divided into sequence of logical pages
  • Frame size same as page size
  • (Still assuming all of a process is loaded into
    RAM at once)

13
Example
Physical Memory
Program (process)
What physical addresses correspond to logical
address 0, 1024, 3000 (assuming 1024 page size)?
(base 10 addresses)
14
Address Structure
  • Usually the page/frame size is a power of two
  • E.g., 1024, 2048, 4096
  • This gives memory addresses two parts
  • Top bits page number
  • Bottom bits page offset
  • Offset the number of bits required to index
    within a page
  • Example
  • 1024 byte page size
  • 16 bit address
  • Offset is lower 10 bits (210 1024)
  • need 10 bits to index within a 1024 byte page
  • Top 6 bits for page number

15
Example
Physical Memory
Program (process)
Give the binary logical and physical logical
addresses for base 10 addresses 0, 1024, 2058
(assuming 1024 page size)?
16
Example
  • What about 32 bit logical addresses with a 4096
    page size?
  • Number of bits in page number?
  • Number of bits in offset?
  • Maximum number of logical pages per process?

17
How do we represent an address space like this
for a process?
Physical Memory
Program (process)
18
Page Table
  • Each process with an address space needs to have
    a page table
  • Maintained by operating system (kernel space)
  • Part of the PCB for a process
  • Page table maps from logical page numbers to
    frame numbers
  • One strategy
  • Each page table contains the full set of possible
    entries
  • Size 2(number of bits in the address for page
    number)
  • E.g., 1024 byte page, 16 bit address 6 bit page
    number
  • 26 entries in each page table 64 entries
  • Question What is the size of a processes page
    table for a 4096 page size, and 32 bit addresses?

19
Thread vs. Heavy Weight Process
  • Given the answer to the last question, what is a
    major advantage of threads as compared to heavy
    weight processes?

20
Questions
  • How many actual physical memory accesses are
    required in previous scenario for each logical
    memory access?
  • Assume that page table is stored in RAM in the
    processes PCB
  • What happens if we dont have hardware support
    for paging?

21
Hardware Paging Support
  • Without hardware support for page tables
  • Each memory access requires a page table look up,
    to retrieve frame number for the page
  • Plus a memory access to retrieve info from
    process frame
  • Standard solution
  • Cache page table entries in special, fast, memory
  • Fast associative memory
  • Translation Look-aside Buffer (TLB)
  • Each entry key, and value
  • Given a key (logical page ), translates to a
    value (physical frame )
  • Size of TLB is relatively small
  • E.g., between 64 and 1024 TLB cache entries
  • On a TLB hit, rapidly obtain frame for page
  • On a TLB miss, have to do two memory accesses
  • But put key, value pair into TLB

22
Effective Access Time (EAT)
  • Calculating the effective time with which memory
    is accessed
  • Need information about TLB hits, misses
  • EAT Prob-hit hit-time Prob-miss miss-time
  • Given
  • memory access 100 time units
  • TLB access 20 time units
  • 85 of the time we get a TLB hit
  • What is EAT?

23
Fragmentation
  • External
  • With paging, external fragmentation problem is
    solved
  • Every frame of memory can be used
  • Internal
  • Average of ½ frame of memory per process lost
  • Because, in general, a process will not have a
    size in bytes that is evenly divisible by the
    page size
  • Page size is a factor
  • Smaller pages, less space lost to fragmentation
  • BUT Larger pages have less overhead (e.g., page
    table size)

24
Segmentation
  • Paging divides memory into equal sized units
    (pages, frames)
  • Segmentation divides memory into different sized
    units, depending on program parts
  • E.g., stack, data area, code area
Write a Comment
User Comments (0)
About PowerShow.com