Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links

1
Analog Multi-Tone Signaling for High-Speed
Backplane Electrical Links

• Amirkhany1, A. Abbasfar2, V. Stojanovic3, and M.
  Horowitz1,2
• 1Stanford University
• 2Rambus Inc
• 3Massachusetts Institute of Technology

2
High-Speed Link

• Multi Gb/sec chip-to-chip communication over PCB
  traces.
• Routers, XAUI, PCI express

Channel
3
State of the Art Links

• 2.5-12.5Gb/Sec, 20-40mW/Gbps
• Baseband 2PAM or 4PAM
• 4-5 tap discrete linear transmit equalizer
• 5-20 tap (predictive or partial response) DFE
• Designed for BER of 10-15
• No error detection/correction coding

4
Potential of Multi-Tone
S21 (dB)

• Better power allocation over channels with a
  notch
• Parallelized data stream in frequency leading to
  implementation advantages

f (GHz)
5
Design Considerations

• Power efficiency is the main constraint
• Cannot afford high-resolution ADC
• 20G, 8bit ADC 450mW/GHz (ISSCC-03)!
• Limits signal processing
• 1GSample/Sec, 128-point FFT 175mW/GHz
  (JSSC-05)!
• Rules out DMT techniques
• A customized MT architecture is required
• Few sub-channels can create close to optimum
  transmit spectrum

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Analog Multi-Tone (AMT)

• A bank of parallel links on different carrier
  frequencies
• Sub-channels not independent
• Inter-channel interference (ICI) exists

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Practical Architecture

• N-times over-sampled equalizers per sub-channel
• Receive filters are integrators
• MIMO DFE in the receiver
• Power Number of taps x operating rate
• Tx/DFE power equal to a BB Tx/DFE covering same BW

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Analysis Framework (Convex - SOCP)

• Find Tx equalizer and Rx DFE taps that
• Minimize transmit peak voltage (power)
• Meet BER constraint per sub-channel

• dmin Minimum distance at Rx (linear)
• offsetk Receiver sampler dead-band (fixed)
• snoise Sigma residual interf. and thermal
  (norm-2)

SOCP
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ZFE with BER Constrained Power Allocation

• Step 1 Independent sub-channel tap optimization
  (ZFE)
• Minimize interference power from one transmitter
  to all receivers (find WTx,k and WFB,mk)
• Independent of sub-channel transmitter power

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ZFE with BER Constrained Power Allocation

• Step 2 Joint power allocation (BER constrained)
• Co-optimize g coefficients to meet BER constraint
  for all sub-channels
• Model interference as peak distortion
• BER constraint per sub-channel is linear in gk
• SOCP reduces to an LP in vector g

• A,B fixed since taps are fixed
• Solution is g B-1b

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Closed Form Jitter Modeling
Tx Jitter
Rx Jitter
Variance at kth Rx output
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Performance on a Channel with Notch
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Performance on a Smooth Channel

• Comparable hardware complexity
• AMT can achieve higher rates
• Needs better Rx precision at lower rates
• Possible since AMT samplers operate at half BB
  (4PAM) rate

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Conclusion

• High-speed links must be power efficient
• DMT-type approaches not practical
• The AMT architecture is power-efficient
• Comparable complexity with BB
• AMT has clear advantage over channels with a
  notch
• Comparable performance over smooth channels