Implementing Real Time packet Scheduling Algorithms on IXP1200

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Implementing Real Time packet Scheduling
Algorithms on IXP1200

• Weidong Shi,
• Indrani Paul,
• Liang Xiao

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Motivation and Objective

• Real Time media servers need to support 100s
  (even 1000s) of clients with individual RT(Q0S)
  constraints.
• Need fast/efficient scheduling on such servers.
• Need packet level parallelism to serve several
  multimedia streams concurrently.
• IXP1200 provides these requirements.
• Objective is to explore and implement real-time
  packet scheduling algorithms and ensure quality
  of service (QoS) for different concurrent
  multimedia streams.
•  

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Project Overview

• Literature Survey.
• Introduction to IXP architecture and Microengine
  programming.
• Implementing Start-Time Fair Queuing (SFQ)
  algorithm in Microengine and collect some
  performance measures like bandwidth division,
  latency, loss rate.
• Implementing an approximate DWCS in Microengine
  and collect some performance measures like
  latency, loss rate, deadlines missed.

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Architecture Overview
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Microengine Programming

• Each of the six IXP1200 microengines is
  independently (micro)programmable.
• 3 banks of local 32 bit registers. 128 GPRs, 64
  SDRAM transfer registers, 64 SRAM transfer
  registers.
• 1K long word instruction buffer.
• Two types of addressing modes Context relative
  and absolute.

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Parameters

• One Microengine (four threads) receives packets
  from four input ports.
• One Microengine (one thread) runs either SFQ or
  DWCS packet scheduler.
• Two Microengines send packets to output ports.

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General Structure of the program files used

• Workload generator
• Receiver.uc
• Scheduler.uc - implements SFQ and DWCS
• Transmitter.uc
• Program to analyze the output data and generate
  some performance characteristics
• Now all these modules will be described.

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Workload Generator

• The purpose is to convert traffic models or real
  traces to the IXP1200 workbench format.
• Packet format

Payload
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Receiver Algorithm

• Wait for the signal from scheduler
• while TRUE
• Wait until the input port has data
• if no buf, get free buf from the buffer pool
• if(SOP) then
• Read 1st 64 byte from rfifo to buf
• Check bridge and route table to find the dest
  port, modify header.
• elseif(!SOP !NOP) then
• Read 64 byte from rfifo buf
• else //(EOP)
• Read the stream ID from packet header.
• Insert the packet into the circular buffer.
• endif
• endw

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Scheduler SFQ

• Motivation for choosing SFQ(suitable for ISDN)
• achieves low average as well as maximum delay for
  low-throughput applications (e.g., interactive
  audio, telnet, etc.)
• provides fairness which is desirable for VBR
  video
• provides fairness, regardless of variation in
  server capacity, for throughput-intensive,
  flow-controlled data applications
• enables hierarchical link sharing which is
  desirable for managing heterogeneity
• computationally efficient.

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SFQ Algorithm

• On packet arrival compute start tag as
• S(pjf) maxv(A(pjf)),F(pj-1f) jgt1
• where F(pjf) is the finish tag
• F(pjf) S(pjf) ljf/ rf jgt1
• F(p0f) 0 rf weight of flow f
• v(t) server virtual time
• V(0) 0, v(t) start tag during busy period
• v(t) max finish tag at the end of busy period
• Packets are serviced in increasing order of start
  tags, ties broken arbitrarily.

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Scheduler DWCS

• Motivation for choosing DWCS
• DWCS limits the number of late packets over
  finite windows of arrivals requiring service.
• Fast/efficient scheduling.
• Can safely drop late packets in lossy streams
  thus avoiding unnecessary bandwidth consumption.
• Can exhibit both fairness and unfairness
  properties when necessary.
• Does not require a-priori knowledge of the worst
  case loading from multiple streams.

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DWCS Algorithm

• while TRUE
• Find stream i with highest priority (according
  to rule table )
• Service packet at head of stream i
• Adjust loss-tolerance for i according to some
  rules.
• Deadline(i) Deadline(i) Inter-packet gap(i)
• For each stream j missing its deadline
• While deadline is missed
• Adjust loss-tolerance for j according to
  some rules.
• Drop head packet of stream j if droppable
• Deadline(j) Deadline(j) Inter-packet
  gap(j)

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Pairwise Packet Ordering Table

• Precedence among pairs of packets
• 1. Earliest Deadline First (EDF).
• 2. Equal deadlines, order lowest window
  constraint first.
• 3. Equal deadlines and zero window-constraints,
  order highest window-denominator first.
• 4. Equal deadlines and equal non-zero
  window-constraints, order lowest window-numerator
  first.
• 5. All other cases First-Come-First-Serve.

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Approx algorithm in our implementation

• We implemented three rules 1, 3, 5.
• Reasons
• To do any manipulation using the ratio
  loss-tolerance we need to use floating point
  division but IXP1200 supports only integer /- ,
  that takes a lot of time to emulate division
  using integer /-, shift makes the scheduler
  slow.
• Microengine can support only 4KB of code.
• By using more variables we may run short of SRAM
  registers.

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Transmitter Algorithm

• While TRUE
• Get queue(port) assignment from scheduler
• Restore port context
• if(1st 64 byte) then read queue information and
  packet information
• if(EOP) then send data to tfifo, free buf and
  clear port context
• else send data to tfifo and save port context
• endif
• else
• if(last 64 bytes) then send data to tfifo, free
  buf and clear port context
• else send data to tfifo and save port context
• endif
• endif
• Instruct the tfifo to send data to the IXBus
• endw

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SFQ Experimental Setup

• two input ports, one output port
• Two streams for each input port
• Each stream has 100 packets
• For each input port, the packets from two input
  streams are interleaved
• Simulation stops when all the streams finish
  sending all their packets

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DWCS Experimental Setup

• two input ports, one output port
• Two streams for each input port
• Different intervals for each stream, the smallest
  interval for stream 1, the largest for stream 4.
• Junk packets inserted between consecutive stream
  packets.

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Discussion and Conclusion

• SFQ guarantees fair sharing of bandwidth under
  overloaded conditions.
• DWCS is deadline sensitive.
• The approximate version of DWCS is not much
  sophisticated, since it does not use all the
  rules.
• To improve the performance we can combine
  features from both these algorithms.
• The scheduler code can be optimized by some
  restructuring of the code.

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Reference

• Analysis of a Window-Constrained Scheduler for
  Real-Time and Best-Effort Packet Streams,
  Richard West and Christian Poellabauer
• Start-time Fair Queuing A Scheduling Algorithm
  for Integrated Services Packet Switching
  Networks,Pawan Goyal, Harrik M. Vin, Haichen
  Cheng
• IXP1200 Network Processor Programmers
  Reference
• THANK YOU