Interim Review

1
Interim Review

• Scooby Doo gang
• Jonathan Hsieh
• Annie Pettengill
• Jim Hollifield
• Jeff Barbieri
• Matt Silverstein

2
Design Goals

• Mystery Machine Requirements
• Correctness / Proficiency
• Compliance to external interface / protocol
• support an interface for human to play
• Asynchronous Decide now button
• Speedup over pure baseline software 68HC11
  based-implementation.
• Hardware HCI. (software hci optional)
• Opening / closing book (download/upload in play
  configurations)

3
Architecture features

• Observation
• Memory (12 nsgt 83 Mhz) is as fast as max FPGA
  speed(100 Mhz).
• about 10x faster than 8Mhz HC11.
• Zoinks!
• Clock set at high FPGA clock speed
• HC11 clock psuedo clock. a function in the
  FPGA -- slows the FPGA clock to something in HC11
  range.

4
FPGA Hardware Units
HC11
Psuedo Clk
Memory Bus Controller
Mem
Chess Board Registers
Chess Piece Registers
HCI
Eval Unit
Attack/Check Unit
Gen Unit
5
FPGA/Memory organization

• Specific addresses would contain specific
  information all the time.
• Board representation address
• current eval score
• in check map
• next generated moves
• Addresses can be proxied by fpga so that fpga
  registers acts like memory to HC11!

6
Sub tasks.
If it werent for those meddling kids!
7

• Attack / In Check Annie
• Gen Jim
• Eval Matt
• HCI Barbie
• SW / Co Sim Jon.

8
Generator FSM
Reset
x7
x7
x7
Q move Back Right

P take Left
Q move Back
Q move Right
Pawn
x7


x7
P take Right

P move 2
R move Right
x8
Q move Forward Right
Q move Back Left
Queen
x7
x7
P move 1
x7

R move Forward
R move Left
x2

Q move Left
Q move Forward
Q move Forward Left
x7
Rook
R move Back
x7
N move 7
x7
N move 6
x7
N move 0
Knight
N move 5
K move Forward Right
N move 1
K move Right
x7
K move Forward
x2
B move Forward Right
N move 4
N move 2
K move Back Right
K move Forward Left
King
x7
N move 3
B move Forward Left
B move Back Left
x2
K move Back
K move Left
x7
B move Back Right
K move BackLeft
Bishop
Special
x7
- moves skipped by gen_caps()



Castle K side
Castle Q side
En Passant Left
En Passant Right
DONE

- moves checked by gen_promote()
9
LCD Layout
Move A2B3
10
Specs

• 64 x128 pixels
• 8x12 squares for each piece (6x10 effective
  drawing space.)
• Easy to program uController built into display
  (has built in frame buffer). May be difficult to
  connect.
• Some code written. Need hardware implemented to
  debug.

11
Software optimizations

• Jonathan Hsieh

12
Original Profiling (Sparc)

• In_check -gt attack
• 55 of program run time!
• Straight forward for hardware
• Eval -gt eval_
• 25 program run time!
• Straight forward for hardware.
• Gen
• 15 of program!

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14
Conclusion

• Eval and gen are most crucial.
• Attack is only 10 now
• Make move and takeback take significant time.

15
Integration plan
Software/Profiling
HW/SW Partitioning
Baseline Stats
FPGAAttack
FPGAEval
FPGAGen
HW/SW Interface
SW modification / optimization
LCD screen HCI
CoSim
Physical Design
Integration/Debugging
Optimizations
New Stats
16
Demonstration Plan

• Demo 1 (week of 10/4)
• Stats on baseline chess algorithm.
• HW/SW partitioning and interfacing method
  Decided but may be in the air due to FPGA issues.
• Details about HW sub systems - Yup
• (Co)simulation of separate parts of HW/SW
  partitioning Not yet.

17
Demo 1 Work Schedule (orig)

• 9/17 F. Demo 0 completion
• 9/20 M. Internal design review
• 9/22 W. HW/SW partitioning details
• 9/23 R. Design review
• 9/29 W. HW/SW interfacing resolved
• 10/4 M. Verilog simulations for FPGA stuff.

18

• Demo 2 (Week of 11/1)
• Frozen Physical Hardware might be
• Co Simulation working with hw/sw should be
• Chess that works and communicates. delay
• Preliminary stats on new design delay
• Optimizing / Debugging process always!
• HCI Talking with HC11. (independent of chess) -
  new

19
Demo 2 Work Schedule(orig)

• 10/11 M. HW/SW integration/Co-simulation
• 10/18 M Physical Hardware frozen
• 10/25 Algorithm Optimizations
• 11/1 Clock speed optimizations

20
Final Demo

• Final Demo 11/29
• Optimizations and speedup statistics.
• HCI
• Eaten into 2 weeks of the one month for
  unpredicted delays.