Logic Gates

1
Logic Gates

• Ghader Kurdi

• Adapted from the slides prepared by DEPARTMENT OF
  PREPARATORY YEAR.

2
Introduction to Digital Logic Basics

• Hardware consists of a few simple building blocks
• These are called logic gates
• AND, OR, NOT,
• NAND, NOR, XOR,
• Both the inputs and output to/from logic gates
  are expressed in terms of 1s and 0s

Logic gate Performs logical operation
output
Input/s
3
Design of Logic Gates

• The basic logic gates are
• AND
• OR
• NAND
• NOR
• XOR
• XNOR
• Inverter (NOT)
• Buffer

4
Design of Logic Gates

• Logic gates are built using transistors
• NOT gate can be implemented by a single
  transistor
• AND requires 3 transistors
• Transistors are the fundamental devices that any
  electronic system consists of
• Pentium consists of 3 million transistors
• Compaq Alpha consists of 9 million transistors
• Now we can build chips with more than 100 million
  transistors

5
AND gate

• AND function finds the minimum between two binary
  digits
• AND gate outputs a 1 only if all the inputs are 1.

F B A
0 0 0
0 1 0
0 0 1
1 1 1
Graphical representation
F A . B or F AB Logical representation
Truth table
6
OR gate

• OR finds the maximum between two binary digits
• OR gate outputs a 1 if any one of the inputs is1.

F B A
0 0 0
1 1 0
1 0 1
1 1 1
Graphical representation
F A B Logical representation
Truth table
7
NAND gate

• NAND AND NOT
• The output is "false" if both inputs are "true."
  Otherwise, the output is "true."

F B A
1 0 0
1 1 0
1 0 1
0 1 1
Graphical representation
F A . B Logical representation
Truth table
8
NOR gate

• NOR OR NOT
• The output is "true" if both inputs are "false."
  Otherwise, the output is "false."

F B A
1 0 0
0 1 0
0 0 1
0 1 1
Graphical representation
F A B Logical representation
Truth table
9
XOR gate

• XOR implements exclusive-OR function
• The output is "true" if either, but not both, of
  the inputs are "true." The output is "false" if
  both inputs are "false" or if both inputs are
  "true."

F B A
0 0 0
1 1 0
1 0 1
0 1 1
Graphical representation
A B A B A B Logical representation
Truth table
10
XNOR gate

• The output is true when both inputs A and B are
  true and when neither A nor B is true.

F B A
1 0 0
0 1 0
0 0 1
1 1 1
Graphical representation
A B Logical representation
Truth table
11
NOT (Inventer) gate

• Has only one input
• Outputs the inverse of the value inputted

F A
1 0
0 1
Graphical representation
F A or A Logical representation
Truth table
12
Buffer

• Has only one input
• Outputs the same value inputted

Y A
0 0
1 1
Graphical representation
Y A Logical representation
Truth table
13
Integration levels

• SSI (small scale integration)
• Introduced in late 1960s
• 1-10 gates (previous examples)
• MSI (medium scale integration)
• Introduced in late 1960s
• 10-100 gates
• LSI (large scale integration)
• Introduced in early 1970s
• 100-10,000 gates
• VLSI (very large scale integration)
• Introduced in late 1970s
• More than 10,000 gates

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Logic Functions

• Logical functions can be expressed in several
  ways
• Truth table
• Logical expressions
• Graphical form
• Example
• Majority function
• Output is 1 whenever majority of inputs is 1
• We use 3-input majority function

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Truth Table
F . C B A
. 0 0 0
. 1 0 0
. 0 1 0
. 1 1 0
. 0 0 1
. 1 0 1
. 0 1 1
. 1 1 1
. . . . .
The truth table has a column foe each input on
the left hand side
The outputs are listed in columns on the right
hand side

• In a truth table, the number of rows (number of
  inputs)2

16
Logic Functions (cont.)

• 3-input majority function
• A B C F
• 0 0 1 0
• 0 1 0 0
• 0 1 1 1
• 1 0 0 0
• 1 0 1 1
• 1 1 0 1
• 1 1 1 1

• Logical expression form
• F A B B C A C

0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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Logic Functions (cont.)

• Logical expression Q AB AB

A B A B AB AB Q
1 0 1 0
0 1 0 0
0 0 1 0
0 1 1 0
1 1 0 0
0 0 1 1
0 1 0 1
18
Logic Circuit Design Process

• A simple logic design process involves
• Problem specification
• Truth table derivation
• Derivation of logical expression
• Simplification of logical expression
• Implementation

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Logical Equivalence

• All three circuits implement F A B function

20
Logical Equivalence (cont.)

• Proving logical equivalence of two circuits
• Derive the logical expression for the output of
  each circuit
• Show that these two expressions are equivalent
• Two ways
• You can use the truth table method
• For every combination of inputs, if both
  expressions yield the same output, they are
  equivalent
• Good for logical expressions with small number of
  variables
• You can also use algebraic manipulation
• Need Boolean identities

21
Logical Equivalence (cont.)

• Derivation of logical expression from a circuit
• Trace from the input to output
• Write down intermediate logical expressions along
  the path

A
AB
B
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Logical Equivalence (cont.)

• Proving logical equivalence Truth table method
• A B A B (A B) F2 (A B)

0 0 1 1
0 1 0 1
1 0 1 0
1 1 1 0
0 0 0 1
1 1 0 0
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Logical Equivalence (cont.)

• Derivation of logical expression from a circuit

24
Logical Equivalence (cont.)

• Proving logical equivalence Truth table method
• A B F1 A B F3 (A B) (A B) (A B)
• 0 0 0
  0
• 0 1 0
  0
• 1 0 0
  0
• 1 1 1
  1

25
The Universal NAND Gate

• NAND gate is the main fundamental universal gate
  for being easier in manufacturing process.

26
The Universal NAND Gate (cont.)
27
The Universal NAND Gate (cont.)
F B A
0 0
1 0
0 1
1 1
0
0
1
1
0
0
1
F B A
1 0 0
1 1 0
1 0 1
0 1 1
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The Universal NAND Gate (cont.)
F B A
0 0 0
1 0
0 1
1 1
0
0
1
1
0
1
1
F B A
1 0 0
1 1 0
1 0 1
0 1 1
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The Universal NAND Gate (cont.)
F B A
0 0 0
0 1 0
0 1
1 1
0
1
1
1
0
0
1
F B A
1 0 0
1 1 0
1 0 1
0 1 1
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The Universal NAND Gate (cont.)
F B A
0 0 0
0 1 0
0 0 1
1 1
1
1
0
0
1
1
0
F B A
1 0 0
1 1 0
1 0 1
0 1 1
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The Universal NAND Gate (cont.)
32
The Universal NAND Gate (cont.)
F A
0
1
1
0
1
0
F B A
1 0 0
1 1 0
1 0 1
0 1 1
33
The Universal NAND Gate (cont.)
F A
1 0
1
0
1
0
1
F B A
1 0 0
1 1 0
1 0 1
0 1 1
34
The Universal NOR Gate

• NOR gate is also another main fundamental
  universal gate

35
Deriving Logical Expressions

• Derivation of logical expressions from truth
  tables
• sum-of-products (SOP) form
• product-of-sums (POS) form
• SOP form
• Write an AND term for each input combination that
  produces a 1 output
• Write the variable if its value is 1 complement
  otherwise
• OR the AND terms to get the final expression
• POS form
• Dual of the SOP form

36
Deriving Logical Expressions (cont.)

• 3-input majority function
• A B C F
• 0 0 0 0
• 0 0 1 0
• 0 1 0 0
• 0 1 1 1
• 1 0 0 0
• 1 0 1 1
• 1 1 0 1
• 1 1 1 1

• SOP logical expression
• Four product terms
• Because there are 4 rows with a 1 output
• F A B C A B C
• A B C A B C

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Deriving Logical Expressions (cont.)

• 3-input majority function
• A B C F
• 0 0 0 0
• 0 0 1 0
• 0 1 0 0
• 0 1 1 1
• 1 0 0 0
• 1 0 1 1
• 1 1 0 1
• 1 1 1 1

• POS logical expression
• Four sum terms
• Because there are 4 rows with a 0 output
• F (A B C) (A B C)
• (A B C) (A B C)

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Boolean Algebra

• Boolean algebra can be used to formalize the
  combinations of binary logic states.
• In these relations A and B are binary quantities,
  
• they can be either logical true (T or 1) or
  logical false (F or 0).

39
Boolean Algebra
40
Boolean Algebra (cont.)
41
Logical Expression Simplification

• Prove that A B (A B) (A B) (A B)
• Used rules
• (A B) (A B) (A B) Distribution
• (A BB) (A B) Complement
• (A 0) (A B) Identity
• A (A B) Distribution
• AA AB Complement
• 0 AB Identity
• AB

42
Logical Expression Simplification

• Prove that A B (A B) (A B) (A B)
• Used rules
• (A B) (A B) (A B) Idempotent
• (A B) (A B) (A B) (A B)
• ((A B) (A B)) ((A B) (A B)) Distribution
  
• (A BB) (B AA) Complement
• (A 0) (B 0) Identity
• (A)(B)
• AB

43
Logical Expression Simplification (cont.)

• Prove that XXY X
• Used rules
• XXY
• X(1Y) Null
• X(1) Identity
• X

44
Logical Expression Simplification (cont.)

• Prove that X(XY) X
• Used rules
• X(XY) Distribution
• XXXY Idempotent
• XXY
• X(1Y) Null
• X(1) Identity
• X

45
Logical Expression Simplification (cont.)

• Prove that X.(YZ) X.Y X.Z
• Used rules
• X.Y X.Z Distribution
• (X.Y X) (X.Y Z) Absorption
• X . (X.Y Z) Distribution
• X . (ZX . ZY) Associative
• (X . XZ) . (YZ) Absorption
• X . (YZ)

46
Logical Expression Simplification (cont.)

• Prove that X(XX') X
• Used rules
• X(XX') Distribution
• XX XX Idempotent
• X XX Complement
• X 0 Identity
• X

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Logical Expression Simplification (cont.)

• Majority function example
• A B C A B C A B C A B C
• A B C A B C A B C A B C A B C A B C
• We can now simplify this expression as
• B C A C A B
• A difficult method to use for complex expressions

Added extra
48
Logical Expression Simplification (cont.)

• Simplify the next
• WY XY WZ XZ (W X) (Y Z)
• Used rules
• WY XY WZ XZ Distribution
• Y(W X) Z(W X)
• (W X) (Y Z)

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Logical Expression Simplification (cont.)

• Simplify the next (X Y) (X Y) 0
• Used Rules
• (X Y) (X Y) Associative
• (X X) ( Y Y) Complement, Idempotent
• 1 Y Null
• 1
• 0

50
Logical Expression Simplification (cont.)

• Simplify the next (X Y) (X Y) 0
• Used Rules
• (X Y) . (X Y) De Morgan
• (X . Y) . ( X . Y) De Morgan
• (X . Y) . ( X . Y) Associative
• (X . X) . (Y . Y) Idempotent
• (X . X) . (Y) Complement
• 0 . Y Null
• 0

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Simplification Using Boolean Algebra

• ABA(BC)B(BC)
• (distributive law)
• ABABACBBBC
• (Idempotent BBB)
• ABABACBBC
• (Idempotent ABABAB)
• ABACBBC
• (Absorption BBCB)
• ABACB
• (Absorption ABBB)
• BAC

52
Logical Expression Simplification (cont.)

• Two basic methods
• Algebraic manipulation
• Use Boolean laws to simplify the expression
• Difficult to use
• Dont know if you have the simplified form
• Karnaugh map (K-map) method
• Graphical method
• Easy to use
• limited to problems with up to 4 binary inputs.
  Let's start with a simple example

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Karnaugh Map Method
A 0 B 0
A 0 B 1
A 1 B 0
A 1 B 1
Karnaugh Map Of Two Variables
54
Karnaugh Map Method (cont.)
F AB AB

• Step 1 Find a truth table

• Step 2 Draw a K-map

F AB AB B A B A
1 0 1 1 1 0 0
1 1 0 0 1 1 0
0 0 0 1 0 0 1
0 0 0 0 0 1 1
A
0 1
B
1 0
1 0
0 1
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Karnaugh Map Method (cont.)

• Step 3 Group adjacent 1s

• Step 4 Read off a reduced expression

A
0 1
A
0 1
B
B
1 0
1 0
1 0
1 0
AB
0 1
0 1
AB
AB AB A
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Karnaugh Map Method (cont.)
How to group adjacent 1s ?
A
A
A
0 1
0 1
0 1
B
B
B
0 1
0 1
1 0
1 0
1 1
0 0
0 1
0 1
0 1
A
A
A
0 1
0 1
0 1
B
B
B
1 1
1 0
0 0
1 1
1 1
1 1
0 1
0 1
0 1