Chap 9. Programmable logic and memory - PowerPoint PPT Presentation

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Chap 9. Programmable logic and memory

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Title: Chap 9. Programmable logic and memory


1
??? ?? ??
Chap 9. Programmable logic and memory
????? ???????? ? ? ? ??
2
??? ??? ???? ??? ??? ???? ??? ????. ???? ??, ??,
??, ????? ?? ??? ????. ROM ?? ?? ???
??? PROM 1? ??????, ?? ?? ??? ??? EPROM ?? ? ??
?? ?? ??? ??? PLD ????? ????? ? ?? ??
PLA AND-OR ??? ???? ??? ??? PAL AND ???
???? ??? ??? GAL PAL? ???, ??? ? ?? EPLD
????? ????? ? ?? PLD FPGA ??? ????? ????? ? ??
EPLD
3
9.1 Memory
?? 9-1 ROM(PROM ? EPROM) ??
4
? 9.1 ROM?? ??? ???
5
?? 9-2 3X8 ???, ????, ???? ??? ROM
6
?? 9-3 ?? ?? PROM ?
7
?? 9-4 ???? ROM? ????
8
? 9.2 Intel EPROM ??? ??? ?? ? ??
9
6.2 Using an EPROM to realize a sequential circuit
?? 9-5 EPROM/ROM ? ???? ?????? ??? ????
10
9.3 Programmable Logic Devices
?? 9-7 AND? OR ?? ??? ?? ??? PLA
11
?? 9-8 ???? O3, O2, ? O1 PAL??
12
?? 9-9 PLA ??
13
?? 9-10 PAL ??
14
?? 9-11 ?? I/O PAL
15
?? 9-12 ?????? I/O PAL
16
?? 9-13 ????? ?? PAL
17
?? 9-14 EX-OR ????? ?? PAL
18
?? 9-15 O1, O2, O3? ???? ?? ??? PAL10H8
19
? 9.6 10? ?/?? ??? ???
20
?? 9-16 PAL16R4? ???? ??? ?/?? ???
(a) PAL16R4? ???? ??? ?/?? ??? ???? F4 F3
21
?? 9-16 Continued
(b) PAL16R4? ???? ??? ?/?? ??? ???? F2 F1
22
(c) PAL16R4? ???? ??? ?/?? ??? TC ??
?? 9-16 Continued
23
9.4 Erasable Programmable Logic Devices
?? 9-23 EPLD? ???? ??
24
? 9.10 ???? PLD? ???? PLD? ??
25
?? 9-24 Altera EPLD ?? ???
26
?? 9-25 EPM5000 ??? EPLD ??? ?
27
?? 9-26 EP600 EPLD ??? ?
28
?? 9-27 74xx191 ?-?? ???
29
?? 9-30 PLD ???? ???
30
9.6 Field Programmable Gate Array
?? 9-37 Xilinx ?? ?????? ??? ??? ??
31
?? 9-38 Xilinx 2000 ??? FPGA ?? ??
32
?? 9-39 Xilinx FPGA I/O ??
33
?? 9-40 Xilinx 3000 ??? ?? ??
34
?? 9-41 ???? ??? ????? ??? ?? ??
35
?? 9-42 ? ?? 4 ?? ??? ????? ??? ?? ??
36
?? 9-43 ?????? ???? ??
37
?? 9-44 ????? ???? ???? ??? ????
38
?? 9-45 13 ?? ?????? ??? ? ?? ?? ??? ? ?? CLB
39
?? 9-46 Xilinx ??? ??? ?? ????
40
??9-47 ?? ?? ??? ?? ??? Xilinx FPGA ????
41
?? 9-48 ?? EPROM? ??? Xilinx FPGA ????
42
? 9.13 Xilinx FPGA ?? ??? (Xilinx? ??)
43
? 9.14 Xilinx ?????? ?? ???
44
(a) PIO Input/Output Pad
(b) Multiplexed Data Latch
?? 9-51 ??? ????? ?
45
(d) 74xx151 8-to1 Multiplexer
?? 9-51 ??? ????? ?
(c) 1-of-8 Decoder
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