1CADENCE DESIGN SYSTEMS, INC.

1
Cadence Front to Back EndAdil Sarwar

• March 2004

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Presentation Overview

• Tool Setup
• Virtuoso Schematic Editor (Composer) for design
  entry
• Analog Design Environment (Analog Artist) for
  netlisting and simulation.
• Virtuoso LE for layout
• Diva for physical Verification
• Mixed-signal simulations / AMS Designer

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Tool Setup

• Source new cshrc file , IC 5.0 installed
• Icfb W -gt to check the version of tool
• cds.lib -gt file in directory from where you want
  to run the tool
• .cdsinit and .env files for initialization and
  bindkeys
• icms , layoutPlus and icfb

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Cadence Flow Diagram
Parasitic re-simulation
Affirma Spectre Analog Simulator
Virtuoso Schematic Editor
back annotation
Diva
schematics
Virtuoso Custom Router
Virtuoso XL
LPE
DRC
LVS
Virtuoso Layout Editor
Physical Design
Physical Verification
Stream
PCell Libraries and technology files
Rules files, technology files
GDSII
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CIW Window
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Library Manager
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Creating Directories and cds.lib file
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Creating Schematic Cell
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Inverter Schematic
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CDF Parameters
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Adding Pins and Wire names
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Virtuoso Cell Creation and LSW
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Virtuoso layout
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Inverter Layout
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Giving Terminal Names
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Diva DRC
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DRC Results in CIW Window
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LVS Setup
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LVS Results

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Model and Libraries

• Models from NCSU Kit or From Mosis site
• analogLib library was used for voltage sources
  and gnd
• basic library was used for pins
• dfII database and environment was used

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Tutorials and Useful sites

• Tutorials available in Cadence Setup
• Go to install directory, the tutorials should be
  here
• ltinstall_dirgt/tools/dfII/samples/tutorials
• cp r cell_design /
• http//www.owlnet.rice.edu/elec522/w9/virtuoso_la
  yout/
• http//www.ee.princeton.edu/cadence/usr/
• NCSU site for tarred kit