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Practical Considerations for Digital Design

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Practical Considerations for Digital Design 1 Objectives You should be able to: Describe the causes and effects of a race condition on synchronous flip-flop operation. – PowerPoint PPT presentation

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Title: Practical Considerations for Digital Design


1
Chapter 11
  • Practical Considerations for Digital Design

1
2
Objectives
  • You should be able to
  • Describe the causes and effects of a race
    condition on synchronous flip-flop operation.
  • Use manufacturers data sheets to determine IC
    operating specifications such as setup time, hold
    time, propagation delay, and input/output voltage
    and current specifications.

2
3
Objectives
  • (Continued)
  • Perform worst-case analysis on the time-dependent
    operations of flip-flops and sequential
    circuitry.
  • Design a series RC circuit to provide an
    automatic power-up reset function

3
4
Objectives
  • (Continued)
  • Describe the wave-shaping capability and
    operating characteristics of Schmitt trigger ICs.
  • Describe the problems caused by switch bounce and
    how to eliminate its effects.
  • Calculate the optimum size for a pull-up resistor.

4
5
Flip-Flop Time Parameters
  • Race condition inputs are changing at the same
    time as the active clock edge

5
6
Flip-Flop Time Parameters
  • Data Manual provides ac waveforms to illustrate
    measuring points
  • Setup time how far back the FF looks to
    determine input levels

6
7
Flip-Flop Time Parameters
  • Hold time how long the input level must be held
    beyond the active clock edge

7
8
Flip-Flop Time Parameters
  • Propagation delay - delay from input to output

8
9
Flip-Flop Time Parameters
  • Other information in Manufacturers Data Manual
  • Maximum frequency (fmax)
  • Clock pulse width tw (L) and tw (H)
  • Set or reset pulse width tw (L)
  • Metastable state
  • Output voltage at an invalid level
  • Delay gate ICs provide exact delays

9
10
Discussion Point
  • Locate the following items on the sample data
    sheet shown in Figure 11-11
  • Pin configuration
  • Function table
  • Propagation delay
  • Setup and hold times

10
11
Automatic Reset
  • RC circuit to reset at power-up

11
12
Schmitt Trigger ICs
  • Transforms slowly changing waveforms to sharply
    defined output signals

12
13
Schmitt Trigger ICs
  • Positive feedback is used to speed up level
    transitions
  • Hysteresis
  • Switching thresholds of positive and
    negative-going signals are different
  • Useful to ignore small amounts of jitter

13
14
Schmitt Trigger ICs
  • Transfer Function

14
15
Switch Debouncing
  • Switch bounce occurs when a mechanical switch is
    opened or closed

Figure 11-35
Figure 11-34
15
16
Switch Debouncing
  • Schmitt method of debouncing a SPST switch

16
17
Switch Debouncing
  • Cross-NAND method of debouncing a SPDT switch

17
18
Switch Debouncing
  • D flip-flop method of debouncing a SPDT switch

Figure 11-38
18
19
Sizing Pull-Up Resistors
  • Used to prevent floating
  • Avoid high power consumption
  • 10 k? resistor works fine
  • Pull-down resistor
  • To keep terminal LOW
  • 100 ? resistor works fine

19
20
Practical Input and Output Considerations
  • 5 V Power Supply
  • 78XX series integrated circuit voltage regulators
  • ac-to-dc rectifier circuit
  • Ripple-free output

20
21
Practical Input and Output Considerations
  • 60 Hz clock

21
22
Practical Input and Output Considerations
  • Driving Light-Emitting Diodes
  • Provides current path (sink) when output is LOW
  • 330 ? resistor limits current

22
23
Practical Input and Output Considerations
  • Phototransistor Input to a Latching Alarm

23
24
Practical Input and Output Considerations
  • Using an Optocoupler for Level Shifting

24
25
Practical Input and Output Considerations
  • Event counting with an optical interrupter switch

25
26
Figures 11-46 and 11-47
26
27
Practical Input and Output Considerations
  • Power MOSFET to Drive a Relay

27
28
Practical Input and Output Considerations
  • Level Detecting with an LM339 Analog Comparator

28
29
Practical Input and Output Considerations
  • Using a Hall-effect switch as a digital input

29
30
Summary
  • Unpredictable results on IC logic can occur if
    strict timing requirements are not met.
  • A setup time is required to ensure that the input
    data to a logic circuit is present some defined
    time prior to the active clock edge.
  • A hold time is required to ensure that the input
    data to a logic circuit is held for some definite
    time after the active clock edge.

30
31
Summary
  • The propagation delay is the length of time it
    takes for the output of a logic circuit to
    respond to an input stimulus.
  • Delay gates are available to purposely introduce
    time delays when required.
  • The charging voltage on a capacitor in a series
    RC circuit can be used to create a short delay
    for a power-up reset.

31
32
Summary
  • The two key features of Schmitt trigger ICs are
    that they output extremely sharp edges and they
    have two distinct input threshold voltages. The
    difference between the threshold voltages is
    called the hysteresis voltage.
  • Mechanical switches exhibit a phenomenon called
    switch bounce, which can cause problems in most
    kinds of logic circuits.

32
33
Summary
  • Pull-up resistors are required to make a normally
    floating input act like a HIGH. Pull-down
    resistors are required to make a normally
    floating input act like a LOW.
  • A practical, inexpensive 5 V power supply can be
    made with just a transformer, four diodes, some
    capacitors, and a voltage regulator.

33
34
Summary
  • A 60-pulse-per-second clock oscillator can be
    made using the power supplys transformer and a
    few additional components.
  • The resistance from collector to emitter of a
    phototransistor changes from about 10 M? down to
    about 1 k? when light shines on its base region.

34
35
Summary
  • An optocoupler provides electrical isolation from
    one part of a circuit to another.
  • Power MOSFETs are commonly used to increase the
    output drive capability of IC logic from less
    than 100 mA to more than 1A.

35
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