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Data Types

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Title: Plain E&F Template Subject: Basic/Structural VHDL Author: CSIS Keywords: Max Salinas - VI Workshop Revision Description: This is the module on basic/structural ... – PowerPoint PPT presentation

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Title: Data Types


1
Data Types
2
Composite Date Types
  • Arrays
  • Single and multi-dimensional
  • Arrays are single Type
  • Records
  • Records are mixed types

3
Array
  • Array is an Indexed Collection of Elements All of
    the Same Type
  • One-dimensional with one index
  • Multi-dimensional with several indices

4
Constrained versus unconstrained Arrays
  • Constrained
  • the bounds for an index are established when the
    type is defined
  • Unconstrained
  • the bounds are established after the type is
    defined
  • Each position in the array has a scalar index
    value associated with it

5
Array Definition Syntax and Example
  • array ( discrete_range , ... )
  • of element_subtype_indication
  • discrete_range is an index
  • name of previously declared type with optional
    range constraint

type Large_Word is array ( 63 downto 0 ) of bit
type Address_List is array ( 0 to 7 ) of
Large_Word
Example 1
Example 2
6
More examples of Array Declaration
array ( discrete_range , ... ) of
element_subtype_indication
  • type 2D_FFT is array
  • ( 1 to 128, 1 to 128 ) of real
  • type Scanner is array
  • ( byte range 0 to 63 ) of integer
  • type Sensor_Status is array
  • ( Stdby, On, Off ) of time

7
Unconstrained Declaration of array
  • type Detector_Array is array
  • ( natural range ltgt ) of natural
  • The symbol ltgt is called a box and can be
    thought of as a place-holder for the index range.
  • Box is filled in later when the type is used.
  • variable X_Ray_Detector Detector_Array
  • ( 1 to 64 )

8
Two Examples of Predefined Unconstrained Types
  • type string is array
  • ( positive range ltgt ) of character
  • type bit_vector is array
  • ( natural range ltgt ) of bit

9
Two more Examples of Predefined Unconstrained
Types
  • type std_ulogic_vector is array
  • ( natural range ltgt ) of std_ulogic
  • type bit_vector is array
  • ( natural range ltgt ) of bit

10
Unconstrained Array Ports
You do the following
  • 1. Specify Port as unconstrained
  • 2. Determine size of port by Index Bounds of
    Signal
  • e.g., AND Gates With Different Number of Inputs

11
1. Example of entity of Unconstrained Array Port
You specify vector of bits with no number here
  • entity And_Multiple is
  • port ( i in bit_vector
  • y out bit )
  • end entity And_Multiple

12
2. AND, example continued
  • architecture And_Multiple_B of
  • And_Multiple is
  • begin
  • And_Reducer process ( i ) is
  • variable Result bit
  • begin
  • Result 1
  • for Index in iRange loop
  • Result Result and i ( Index )
  • end loop

You use Range so you still do not tell how many
bits
variable
Signal created outside the loop
13
AND, example continued
  • y lt Result
  • end process And_Reducer
  • end architecture And_Multiple_B

signal
Here we finished architecture And_Multiple_B
without specifying number of bits
In the next slide we will call this architecture
structurally and at this time the number of bits
will be decided
14
AND, e.g.,
count_value 8 bits
terminal_count
  • signal count_value
  • bit_vector ( 7 downto 0 )
  • signal terminal_count bit
  • tc_gate entity work.And_Multiple
  • ( And_Multiple_B )
  • port map ( i gt count_value ,
  • y gt terminal_count )

architecture And_Multiple_B
  • The Input Port Is Constrained by the Index Range
    of the Input Signal, i.e., An 8-Input AND Gate.

15
Array References
  • Arrays Can Be Equated, Rather Than Having to
    Transfer Element by Element
  • Refer to Individual Elements By
  • 1. Single Index Value, e.g., A ( 5 )
  • 2. Range a contiguous sequence of a
    one-dimensional array can be referred to by using
    it as an index. e.g., A( 5 to 15 )
  • 3. Previously defined subtype
  • 4. Index types do not have to be the same

16
Examples of Array Aggregate
Sensor_Status
Stdby
On
Off
  • type Sensor_Status is
  • array ( Stdby , On , Off ) of time
  • variable FLIR_Status
  • Sensor_Status ( 0 sec , 0 sec , 0 sec )
  • variable FLIR_Status
  • Sensor_Status ( On gt 5 sec )

Changes only one field
17
Array Aggregate Syntax
  • A List of Element Values Enclosed in Parentheses
  • This list is used to initialize Elements of an
    Array to Literal Values
  • aggregate lt ( choices gt
  • expression ... )

type Sensor_Status is array ( Stdby , On , Off
) of time
syntax
18
There are two ways to refer to elements in Array
Aggregate
  • Two Ways of Referring to Elements
  • Positional explicitly list values in order
  • Named Association Explicitly list values by
    their index using choices
  • Order NOT important
  • Positional and Named Association Cannot Be Mixed
    Within an Aggregate.

19
Example of Named Association in Array Aggregate
  • others Can Be Used in Place of an Index in a
    Named Association,
  • Indicating a Value to Be Used for All Elements
    Not Explicitly Mentioned
  • variable FLIR_Status Sensor_Status
  • ( Off gt 10 min, others gt 0 sec )

Named Association Explicitly list values by
their index using choices Order NOT important
20
Example of setting many elements to one value in
Array Aggregate
Here I set 4 elements of array to 1 all other to 0
  • A Set of Values Can Be Set to a Single Value by
    Forming a List of Elements Separated by Vertical
    Bars, .
  • type 2D_FFT is array
  • ( 1 to 128, 1 to 128 ) of real
  • variable X_Ray_FFT 2D_FFT
  • ( ( 60, 68 ) ( 62, 67 ) ( 67, 73 ) ( 60,
    60 ) gt 1.0 , others 0.0 )

21
Array Operations element by element logic
operations
  • One-Dimensional Arrays of Bit or Boolean
  • Element by element AND, OR, NAND, NOR, XOR, XNOR
    can be done on array
  • type Large_Word is array
  • ( 63 downto 0 ) of bit
  • variable Samp_1 , Samp_2 Large_Word
  • ( 0 to 63 gt 0 )

Here we declare variables Samp_1 and Samp_2 that
we will use next
0
Large_Word
0
63
0
22
Array Operations element by element logic
operations
  • constant Bit_Mask Large_Word
  • ( 8 to 15 gt 1 )
  • Samp_2 Samp_1 and Bit_Mask

Bits from 8 to 15 are AND-ed with Bit_Mask
23
NOT Operations
Array Operations element by element logic
operations
  • Complement of elements of a single array, NOT
  • Samp_2 not Samp_1

24
1D Shift and Rotate Array Operations
  • One-Dimensional Arrays Can Be Shifted and Rotated
  • Shift
  • Logical Shifts and fills with zeros
  • Arithmetic Shifts and fills with copies from
    the end being vacated
  • Rotate
  • Shifts bits out and back in at other end

25
Shift and rotate operations
Shift left logic
  • B 1010_1100 sll 4 B 1100_0000
  • B 1010_1100 sla 4 B 1100_0000
  • B 1010_1100 sra 4 B 1111_1010
  • B 1010_1100 rol 4 B 1100_1010

Rotate left
Shift right arithmetic
26
Relational Array Operations
  • One-Dimensional Arrays Can Be Operated on by
    Relational Operators,
  • , / , lt , lt , gt ,
    gt
  • Arrays need not be of the same length
  • Arrays must be of same type

27
Array Operations Concatenation
  • Concatenation Operator,
  • Can combine array and scalar
  • B 1010_1100 B 1100_0000
  • B 1010_1100_1100_0000
  • B 1010_1100 1 B 1010_1100_1

28
Conversion from one Array Type to another
  • One Array Type Can Be Converted to Another If
  • Same element type
  • Same number of dimensions
  • Same index types

29
Example of Array Type Conversions
  • Example
  • subtype name is string ( 1 to 20 )
  • type display_string is array ( integer range 0 to
    19 ) of character
  • variable item_name name
  • variable display display_string
  • display display_string ( item_name )

1 to 20
0 to 19
30
Example of Array Aggregate
  • Assignments Can Be Made From a Vector to an
    Aggregate of Scalars or Vice-Versa.
  • type Sensor_Status is array
  • ( Stdby, On, Off ) of time
  • variable Stdby_Time, On_Time, Off_Time time

Variable FLIR_Status Sensor_Status ( 0
sec , 0 sec ,
0 sec ) ( Stdby_Time, On_Time,
Off_Time ) Flir_Status
Aggregate of scalars
31
Predefined Attributes
  • Predefined Attributes deal with data obtained
    from Blocks, Signals, Types and Subtypes
  • Return values such as
  • length of an array type
  • time since last signal change
  • range of values in a type
  • Predefined attributes are useful for performing
    certain type of functions such as
  • timing checks
  • bounds
  • clock edge detection
  • type conversion

We showed earlier attributes for signals. Now we
show for types
32
Array Type Bound Example use of predefined
attributes
attribute
33
Another Example of array bound
34
Multi-range array attributes
35
Array length attributes
36
Range attributes
37
Type attributes position function
38
Homework Attributes Exercise
39
Example of using Attributes
We calculate resistance dividing voltage by
current
40
User Defined Attributes
  • These attributes attach data to objects
  • They are defined by the user of Data types
  • Data is constant
  • They are accessed with the same syntax as
    predefined attributes

41
User Defined Attributes
42
Records
  • Records in VHDL are collections of Named Elements
    of Possibly Different Types.
  • To refer to a Field of a Record Object, you
    should use a Selected Name.

43
Example of a Record
  • type instruction is
  • record
  • op_code processor_op
  • address_mode mode
  • operand1, operand2
  • integer range 0 to 15
  • end record

Ashenden, VHDL cookbook
44
Records
  • Aggregates Can Be Used to Write Literal Values
    for Records.
  • Positional and Named Association Can Be Used
  • Record field names being used in place of array
    index names.

45
End of Lecture
46
Sources
  • Prof. K. J. Hintz
  • Department of Electrical
  • and
  • Computer Engineering
  • George Mason University
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