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Introduction to Assembly Language

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Title: Introduction to Assembly Language


1
Introduction to Assembly Language
2
What is a Computer?
  • Central Processing Unit (CPU)
  • Executes the programs
  • Primary Memory
  • Stores programs and data
  • Input/Output Devices
  • Allow CPU to communicate with external hardware
  • System Bus
  • Connects everything together
  • Address, Data, Control signals

3
What is a Computer?
4
Von Neumann Model
  • Roots of the modern PC go back to the 1940s
  • John Von Neumann proposed this design
  • CPU
  • Input
  • Output
  • Working Memory
  • Permanent Memory

5
Von Neumann Model
6
The Microprocessor
  • The silicon chip that contains the CPU where most
    calculations take place
  • Microprocessors are distinguished by 3
    characteristics
  • Instruction set the set of instructions that the
    microprocessor can execute
  • Bandwidth the number of bits processed in each
    instruction
  • Clock speed (MHz) It determines how many
    instructions/second the processor can execute

7
Role of The Microprocessor
  • Fetch the Instruction from the memory
  • Fetch the operands of the Instruction
  • Decode the Instruction
  • Execute the Instruction
  • Output the results
  • CPU continuously does the (Fetch-Decode-Execute)
    Cycle

8
Microprocessor Architecture Basic Components
  • CPU Registers
  • special memory locations constructed from
    flip-flops and implemented on-chip
  • e.g., accumulator, count register, flag register
  • Arithmetic and Logic Unit (ALU)
  • ALU is where most of the action take place
    inside the CPU

9
Microprocessor Architecture Basic Components
  • Bus Interface Unit (BIU)
  • responsible for controlling the address and data
    busses when accessing main memory and data in the
    cache
  • Control Unit and Instruction Set
  • CPU has a fixed set of instructions to work on,
    e.g., MOV, CMP, JMP

10
Microprocessor Architecture Instruction
processing
  • Processing of an instruction by microprocessor
    consists of three basic steps
  • fetch instruction from the memory
  • decode the instruction
  • execute (usually involves accessing the memory
    for getting operands and storing results)
  • Operation of an early processor like the Intel
    8085

11
Microprocessor Architecture Instruction
processing
  • Modern microprocessors can process several
    instructions simultaneously at various stages of
    execution
  • this ability is called pipelining
  • Operation of a pipelined microprocessor like the
    Intel 80486

12
Microprocessor Architecture Instruction
processing
13
System Architecture
Address Bus provides a memory address to system
memory and I/O address to system I/O
devices Data Bus transfers data between the
microprocessor and the memory and I/O attached
to the system Control Bus provides control
signals that cause memory or I/O devices to
perform a read or write operation
14
The 8086 family of Microprocessors
15
Processor Data and Address Bus SizesExamples
Processor 8088 8086 80286 80386dx 80486 8058
6/Pentium (Pro)
Data Bus 8 16 16 32 32 64
Address Bus 20 20 24 32 32 32
Max Addressable Memory 1,048,576
(1Mb) 1,048,576 (1Mb) 16,777,21 (16Mb) 4,294
,976,296 (4Gb) 4,294,976,296
(4Gb) 4,294,976,296 (4Gb)
16
Memory
  • Microprocessor addresses a maximum of 2n
    different memory locations, where n is a number
    of bits on the address bus
  • Logical Memory
  • 80x86 supports byte addressable memory
  • byte (8 bits) is a basic memory unit
  • e.g., when you specify address 24 in memory, you
    get the entire eight bits
  • when the microprocessors address a 16-bit word of
    memory, two consecutive bytes are accessed

17
Memory (cont.)
  • Physical Memory
  • The physical memories of 80x86 family differ in
    width
  • e.g., 8088 memory is 8 bits wide,
  • 8086, 80286 memory is 16 bits wide, and
  • 80386dx, 80486 memory is 32 bits wide
  • for programming there is no difference in memory
    width, because the logical memory is always 8-bit
    wide
  • memory is organized in memory banks
  • a memory bank is an 8-bit wide section of the
    memory
  • e.g., the 16-bit microprocessors contain two
    memory banks to form 16-bit wide section of
    memory that is addressed as bytes or words

18
The Memory Subsystem
  • What is a memory location?
  • The 80x86 family support Byte Addressable Memory
    (a byte is the basic memory unit)
  • With an address bus of size n, the processor can
    address a maximum of 2n memory locations
  • example with 20, 24, and 32 address lines, the
    80x86 can address 1Mbyte, 16Mbytes, and 4Gbytes
  • What is the effect of the C statements
  • Memory125 0 A Memory125 ?

19
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20
The Memory Subsystem
  • What happens when when want to access a word?
  • The 80x86 family solution of a word L.O byte in
    the specified address and the H.O byte in the
    consecutive address.
  • A word consumes 2 consecutive memory locations
  • A double consumes 4 consecutive memory locations

21
The Memory Subsystem
  • But we can have a possibility of overlap!
  • Solutions
  • 8088 and 80188 have 8 bits data bus 2 memory
    operations to access a word, 4 to access a double
  • 8086, 80186, 80286, and 80386sx have 16 bits data
    bus Faster Memory Access
  • Use of 2 banks (Even and Odd banks)

22
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23
16 bit Processor Memory Access
  • Accessing a word at an Even numbered addresses 1
    memory operation
  • Accessing a word at Odd numbered addresses 2
    memory operations
  • Only even addressed appear on the address bus

24
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25
16 bit Processor Memory Access
  • What happened when the CPU tries to access a word
    at the odd address 125?
  • Byte 125 is read and placed in H.O, address Buss
    has 124
  • Byte 126 is read and places in L.O, address Bus
    has 126
  • Internal Swap of the 2 bytes

26
32 bit Processors
  • 32 bit processors (80386, 80486, and Pentium) use
    four banks of memory connected to the 32 bit data
    bus
  • Can access a double word in a one memory
    operation

27
Physical Memory System Example (16 bit
microprocessor)
High Bank (odd bank)
Low Bank (even bank)
FFFFFF FFFFFD FFFFFB 000005 000003 000
001
FFFFFE FFFFFC FFFFFA 000004 000002 000
000
8 bits
8 bits
D15 - D8
D7- D0
28
Accessing Data in Memory Example (16 bit
microprocessor)
  • Accessing word from an even address - L.O. byte
    from the address specified and the H.O. byte from
    the next consecutive address
  • What if you access a word on an odd address?

29
Accessing Data in Memory Example (16 bit
microprocessor)
  • Example access memory on address 125, i.e., we
    want to access data on address 125 (L.O.) and 126
    (H.O.)
  • this requires two memory operations
  • read byte on address 125
  • read byte on address 126
  • swap the positions of these bytes internally
    since both entered the CPU on the wrong half of
    the data bus
  • 80x86 CPUs recognize this and perform transfer
    automatically

30
Accessing Data in Memory Example (16 bit
microprocessor)
  • Your programs can access words at any address and
    the CPU will properly access and swap the data in
    memory
  • Think about the speed of your program when
    accessing words at odd addresses

31
Memory Data Types
  • Numbers
  • bit (e.g., 1) nibble 4 bits
  • DB byte octet 8 bits
  • DW Word 2 bytes 16 bits (80x86 terminology)
  • DD DoubleWord 4 bytes 32 bits (80x86
    terminology)
  • Intel uses little endian format (i.e., LSB at
    lower address)
  • Signed Integers (2's complement)

32
Memory Data Types
  • Text
  • Letters and characters (7-bit ASCII standard),
    e.g., 'A'650x41
  • Extended ASCII (8-bit) allows for extra 128
    graphics/symbols)
  • Collection of characters Strings
  • Collection of Strings Documents

33
Memory Data Types (cont.)
  • Programs
  • Commands (MOV, JMP, AND, OR, NOT)
  • Collections of commands subroutines
  • Collection of subroutines programs
  • Floating point numbers (covered later)
  • Images (GIF, TIF, JPG, BMP)
  • Video (MPEG, QuickTime, AVI)
  • Audio (voice, music)

34
Example of Memory with Stored Data
Address Data
(8-bits) Interpretation 0xFFFFF
... 0x75000 0x55
byte ... 0x70009 '
String 0x70008 '1'
0x70007 9 0x70006 2
0x70004 E 0x70003 C
0x70002 E ...
0x60511 0x12 Word
0x60510 0x34 0x6050F 0x12
Word 0x6050E 0x34
0x6050D 0x12 Word
0x6050C 0x34 ...
0x55504 0xFE JE-2 Program
0x55003 opcode 0x55002 0x02 ADD
AL,2 0x55001 opcode
... 0x00000

3x1 integer array of 16-bit words
35
???
36
What is a register?
  • A storage element inside the microprocessor
  • Almost all the operations would involve using
    registers
  • The 8086 has 14 16 bit registers
  • 4 general purpose registers AX, BX, CX, and DX
  • 4 addressing registers SI, DI, SP, and BP
  • 4 segmentation registers CS, DS, SS and ES
  • Instruction pointer IP
  • Flags register

37
The 8086 family of Microprocessors
38
386???????????
  • EAX?ECX?EDX?EBX
  • ?ax,bx,cx,dx???,??32???
  • ESI?EDI?ESP?EBP
  • ?si,di,sp,bp???,32???
  • EFLAG?EIP
  • ?FLAG?IP???,32???
  • FS?GS
  • ?????????

39
Programming ModelRegisters
Note 32 bit registers are not available on
8086, 8088, 80286
40
Programming ModelRegisters (examples)
  • General-Purpose Registers
  • AX (accumulator) often holds the temporary result
    after an arithmetic and logic operation
  • BX (base) often holds the base (offset) address
    of data located in the memory

41
The General Purpose Registers
  • AX a 16 bit register, called the Accumulator
    register
  • It consists or 2 8 bits registers AL and AH
  • AH The high order 8 bits
  • AL The low order 8 bits

42
The General Purpose Registers (Cont)
  • CX (CH,CL) The Counter register
  • BX (BH,BL) The Base register
  • DX (DH,DL) The Data register
  • If AX 0F63H what would be the values of AL and
    AH?

43
?????AX?BX?CX?DX
  • AX?????,BX?????
  • CX?????,DX?????
  • Ax,bx,cx,dx??16???2bytes??????,??ax?????ah?al,?bx?
    ???bh?bl,cx?dx??,?ah?al????8??1byte???,??,??ax347
    8h,??ah34h?al78h?

44
?????(cont.)
  • ??bx??????????????,??,?? ds2300h,bx0200h,????
    mov ax,bx ?????? 23000200 ????????2byes???
    ax,???????? ?mov  p1,p2 ???????,??? ? p2 ?????
    p1?

45
?????(cont.)
46
?????SI?DI
  • SI????????
  • DI????????
  • 16?????,??? bx ?????,???????? 8 ???

47
?????(cont.)
48
Programming ModelRegisters
  • Pointer and Index Registers
  • SP (stack pointer) used to address data in a LIFO
    (last-in, first-out) stack memory
  • BP (base pointer) often used to address an array
    of data in the stack memory

49
????????SP?BP
  • SP????????
  • BP????????
  • SP?????,??? push ???,sp??2,???pop?sp??2?
  • BP??????????,?????????,? mov ax,ssbp ?
  • ?mov ax,ssbp  ??ss???(????)???,????,???ds?????

50
????????(cont.)
51
Programming ModelFlag Register
  • Flags indicate the condition of the
    microprocessor as well as its operation
  • The flag bits change after many arithmetic and
    logic instructions execute
  • Example flags,
  • C(carry) indicates carry after addition or a
    borrow after subtraction
  • O(overflow) is a condition that can occur when
    signed numbers are added or subtracted
  • Z(zero) indicates that the result of an
    arithmetic or logic operation is zero

52
The Flags Register
  • A special register that provides information
    about the last executed instruction
  • The arithmetic flags 5 bits that indicate the
    results of arithmetic and related operations
  • O-flag, S-flag, Z-flag, A-flag, and the C-flag
  • Which flag(s) is affected by those instructions?
  • MOV AL, 3H
  • MOV BL, 2H
  • INC BL
  • SUB AL,BL

53
?????FLAG
  • 16?????,?????2?????
  • AF???????CF?????
  • OF????? SF??(??)???
  • PF????? ZF?????

54
?????(cont.)
  • DF????? IF?????
  • TF?????

55
Programming ModelSegment Registers
  • Segment registers generate memory addresses along
    with other registers in the microprocessor
  • CS(code) defines the starting address of the
    section of memory-holding code(programs and
    procedures used by programs)
  • DS(data) a section of memory that contains most
    data used by a program

56
Programming ModelSegment Registers
  • ES(extra) an additional data segment
  • SS(stack) defines the area of memory used for the
    stack
  • FS and GS available on 80386 and 80486 allow two
    additional memory segments for access by programs

57
????????CS?DS?ES?SS?FS?GS
  • ???? CS ?IP ???????CS?? ??????
  • ???? DS ? mov ax,bx ?????? ??????????
  • ???? ES ? mov ax,esdi ????? ??????????????
  • ???? SS ? SP ????,?????? ???
  • ???? FS????????
  • ???? GS????????

58
????????(cont.)
59
????????(cont.)
60
??/?????(???)IP
  • ??????,??????????????,??? jmp?call?int????????,???
    ?????????????????

61
Memory Addressing
62
Real Mode Memory Addressing
  • 80286 - 80486 microprocessors operate in either
    the real or protected mode
  • 8086, 8088, and 80186 only operate in the real
    mode
  • Real mode operation allows the microprocessor to
    only address the first 1M byte of memory space
    (even if it is an 80486 microprocessor)

63
Real Mode Memory Addressing
  • All 80x86 processors operates in the real mode by
    default
  • All real mode memory addresses consist of a
    segment address plus an offset address
  • the segment address (in one of the segment
    registers) defines the beginning address of any
    64K byte memory segment
  • the offset address selects a location within the
    64K byte memory segment

64
Segmented Memory
  • A mechanism that allows the extend the
    addressability of a Processor
  • In case of 8086, it allowed the processor to
    extend the maximal addressable memory from 64K to
    1megabyte!!
  • It uses 2 components to specify memory locations
    a segment value and an offset value within that
    segment.

65
Why such a scheme?
  • Respecting the self imposed 6 bytes for
    instructions in the 8086 Processor
  • Ability To attach blocks of variables (segments)
    with a particular piece of code (Routines)

66
More on segmentation
  • In the 8086 processor each 20bit address is
    expressed as
  • 16 bit segment
  • 16 bit offset
  • Example 2000H0BAFH
  • Converting a segmented address to the actual
    address
  • Add a 0 to the right hand side of the segment
  • Add to this the offset
  • Example 020A1BCD gtgt 020A0H 1BCDH 036DH

67
Segment Registers
  • 4 16 bit segment register
  • CS Memory segment containing program
    instructions
  • DS Memory segment containing data items
  • SS Memory segment containing working memory
  • ES Memory segment used during the access of
    sequences of characters by special instructions

68
Offsets of Segment Registers
69
Real Mode Memory Addressing (cont.)
  • Generation of 20-bit linear address from a
    segmentoffset address
  • in the real mode, each segment register (16 bits)
    is internally appended with a 0h on its rightmost
    end (i.e., the segment is shifted left by 4 bits)
  • The segment and the offset are then added to
    form 20-bit memory address.

70
Real Mode Memory Addressing Examples
  • (1) Linear address for SegmentOffset 22223333
    25553
  • Segmentoffset address for Linear address25553
  • Many Answers - One possibility
    22223333
  • Many Answers - One possibility
    20005553

71
Real Mode Memory Addressing Examples
  • (2) Linear address for SegmentOffset 1200F445
    21445
  • Segmentoffset address for Linear address21445
  • Many Answers - One possibility
    1200F445
  • Many Answers - One possibility
    20001445

72
Protected Mode Memory Addressing
  • In 80286 and later processors the addressing
    capabilities of a microprocessor are extended by
    changing the function the CPU uses to convert a
    logical address to the linear address space

73
Protected Mode Memory Addressing
  • the protected mode processors use a look up table
    to compute the physical address
  • the segment value is used as an index into an
    array (segment descriptor table)
  • the contents of the selected array element
    provides the starting address for the segment
  • the CPU adds this value to the offset to obtain
    the physical address

74
Use of Segments
75
Peripherals
  • Memory-mapped devices (special memory locations
    in the normal address space of the CPU)
  • BIOS 0xF0000-0xFFFFF (bootstrap, I/O calls)
  • Video 0xA0000-0xBFFFF and vBIOS
    0xC0000-0xC7FFF
  • I/O mapped devices (sound card, com ports,
    parallel port)
  • I/O addresses different than Memory addresses
  • Address Range 0x0000 - 0xFFFF (16-bit)

76
Peripherals
  • Interrupts
  • Notifies the CPU when an event has occurred
  • Timer update clock , serial I/O input data,
    Parallel I/O ready
  • Network adapter packet arrived
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