Microprogrammed Control Unit Design

1
Chapter 7

• Micro-programmed Control Unit Design

2
Micro-Programmed Control Unit

• A hard-wired control unit uses logic to generate
  the control signals needed to implement the
  different microoperations and their sequence.
• A Micro-Programmed control unit utilizes a memory
  (typically ROM) to store these signals in the
  form of a micro-program.

3
Micro-Program

• The micro-program consists of micro-instructions
  that specify the internal control signals for
  execution of microoperations.
• Each machine instruction initiates a sequence of
  micro-instructions in control memory.
• The micro-instructions generate the control
  signals needed to implement the different
  micro-operations of the machine instruction.
• The micro-instructions also control the
  sequencing of the operations.

4
Micro-Programmed Control Unit

• The set of micro-instructions are stored in the
  Control Memory
• The Control Address Register contains the address
  of the next micro-instruction to read
• When a micro-instruction is read, it is
  transferred to a Control Data Register.
• The Sequencing Logic determines the address of
  the next micro-instruction.

Sequencing Logic
Control Address Register
Control Memory
External inputs
Control Data Register
Control Word
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Reason for Micro-programmed Control

• The implementation of a control unit as an
  interconnection of basic logic elements is no
  easy task
• The design must include logic for
• Sequencing through microoperations.
• Executing microoperations.
• Interpreting opcodes.
• Making decisions based on ALU flags.
• It is difficult to design and test such a system.
• The design is also quite inflexible.

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Micro-Programming

• The number of different types of micro-operations
  in a given system is finite
• The complexity comes from the numerous sequences
  of micro-operations that are performed
• Micro-programming is an easier and more
  systematic way of generating the sequences of
  micro-operations for the execution of each
  instruction.

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Micro-Programming

• In a micro-programmed control unit, each time
  cycle is represented by a bit pattern of 0s and
  1s for the different control signals generated in
  the control unit.
• Executing an instruction becomes simply going
  through the correct sequence of these bit
  patterns.
• The bit patterns representing the time cycles are
  stored in the control memory.

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Control Word and Micro-Instruction

• For each micro-operation, the control unit simply
  generates a set of control signals.
• We can construct a Control Word in which each bit
  represents one control line.
• Each microoperation can be represented by a
  different pattern of 1s and 0s in the control
  word.
• Each control word forms a Micro-Instruction which
  specifies one or more microoperations.
• Each micro-instruction has an address in
  micro-memory.

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The Micro-Instruction

• The micro-instruction needs to supply two pieces
  of information
• The control signals to control the hardware.
• Which micro-instruction to execute next.
• These two operations have a large effect on the
  size of the control memory as well as the
  complexity of the control unit as a whole.
• First, lets consider the second item, how to
  sequence the micro-instructions.

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Micro-Instruction Sequencing

• Each machine instruction will be represented by a
  group of micro-instructions in the form of a
  routine.
• For example, the ADD to AC routine
• T0 AR ? PC
• T1 IR ? MAR, PC ? PC 1
• T2 Decode
• D7IT3 AR ? MAR
• D1T4 DR ? MAR
• D1T5 AC ? AC DR, E ? Cout, SC ? 0

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Micro-Instruction Sequencing

• However, there are microoperations common to all
  instructions
• Fetch, decode, effective address calculation,
  etc.
• It does not make sense to repeat these for each
  different instruction.
• The control unit must allow for these common
  operations to be grouped together and accessed
  from the different instructions routines.
• Therefore, the instruction routines will include
  only micro-instructions unique to the specific
  instruction.

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Overall View of Control Memory
. Jump to Indirect or Execute
Fetch cycle routine
. Jump to Execute
Indirect Cycle routine
. Jump to Fetch
Interrupt cycle routine
Jump to Op code routine
Execute cycle begin
. Jump to Fetch or Interrupt
AND routine
. Jump to Fetch or Interrupt
ADD routine
. . .
etc
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Execution Micro-Cycle

• The address of the first micro-instruction of the
  fetch routine is loaded into the control address
  register.
• The micro-operations of the fetch cycle are
  sequenced by incrementing the control address
  register.
• By the end of the fetch routine, the instruction
  has been read into the Instruction Register (IR).
• The instruction may specify one of different
  addressing modes. The control unit must decide
  how to calculate the effective address based on
  the addressing mode.
• Conditional branch based on addressing mode

• After completing effective address calculation,
  the effective address of the operand is now in
  the Address Register (AR)
• The next step depends on the opcode stored in IR.
  The opcode must be mapped into a control memory
  address for the routine that implements the
  specific instruction.
• The micro-instructions of the routine are
  sequenced either through incrementing the control
  address register or through conditional branching
  based on values of status flags.
• At the end, an unconditional branch brings the
  execution back to the fetch routine.

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Sequencing of Micro-Instructions

• After a certain micro-instruction is executed,
  the control unit needs to decide what
  micro-instruction to execute next
• It might be the next one.
• It might be somewhere else in micro-memory.
• Micro-Jump.
• It might depend on the value of external flags.
• Micro-Conditional Jump.
• The hardware that implements the sequencing must
  be capable of sequencing the micro-instructions
  within a routine as well as branching from one
  routine to another.

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Determining Next Address

• Typically, each micro-instruction contains some
  bits that specify the method by which the next
  address is obtained.
• The micro-instruction can be divided into several
  fields
• Control signals.
• Conditions for conditional branching.
• Branch address field(s).

Control Signals
Address
Conditions for branching
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Address Sequencing Logic
Instruction Code
Mapping Logic
Branch Logic
Multiplexer
MUX Select
Subroutine Register
Control Address Register
mProc. Status bits
Incrementer
Control Memory
Condition Bits
Microoperations
Branch Address
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Mapping of Instructions

• It was mentioned that each machine instruction
  will be implemented using a routine of
  micro-instructions.
• How does the mapping between the instruction and
  the routine occur?
• Manipulating the OPCODE bits.
• Using a mapping memory.

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Manipulating the OPCODE

• If most machine instructions require about the
  same number of micro-instructions to implement,
  we can use the OPCODE of the machine instruction
  plus some additional bits to form the address of
  the first micro-instruction in the routine.

Machine instruction OPCODE
1 0 1 1
Extra bits
0 0 0
Address of first micro-instruction In the machine
instructions routine
1 0 1 1 0 0 0
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Using a Mapping Memory

• It is also possible to add a small address
  look-up memory inside the control unit.
• The OPCODE of the machine instruction is used to
  look-up the address of the first
  micro-instruction in its routine.

1 0 1 1 0 0 0
1 0 1 1
1 0 1 0 0 0 1 0 0 0 0 1 0 1 0
Instruction OPCODE
Lookup Memory
Control Memory
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Using a Mapping Memory
Control Memory
1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 0 0 0 0 0 1
0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0
0 1 0 0 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 0
0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
1 0 1 1 0 0 0 1 0 1 1 0 0 1 1 0 1 1 0 1 0 1 0 1 1
0 1 1 1 0 1 1 1 0 0 1 0 1 1 1 0 1 1 0 1 1 1 1 0
ADD Routine
Lookup Memory
OR Routine
1 0 1 1 0 0 0
ADD
OR
1 0 1 1 0 1 1
AND
1 0 1 1 1 1 0
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Control Unit Organization
Instruction Register
Sequencing Logic
Control Address Register
ALU Flags
Control Memory
Control Buffer Register
Control Logic
Control Signals
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Vertical vs. Horizontal

• Horizontal Micro-Instruction
• A micro-instruction format that has a bit
  dedicated to each control signal being generated.
• Large number of bits, very wide format.
• Large (slow) control memory.
• Control signals immediately available in control
  word.
• Vertical Micro-Instruction
• A micro-instruction that combines multiple
  control signals into encoded fields.
• Smaller number of bits, narrower memory.
• Control memory is faster.
• Need additional hardware to decode the fields.

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Micro-Instruction Encoding

• The control signals generated by the control unit
  form natural groups that are mutually exclusive.
• For example, the control signals for AR will
  never be active at the same time.
• It is possible to make use of this natural
  feature and encode these mutually exclusive
  signals into fields.
• Once the micro-instruction is read from the
  control memory, these fields will be decoded to
  retrieve the original signals.
• The advantage is a smaller control memory.

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Micro-Instruction Encoding

• The micro-instruction is divided into fields of
  related and mutually exclusive operations.
• The bits of the fields are passed to decoders to
  generate the individual control signals.
• The different fields of the micro-instruction
  must specify operations that can occur
  simultaneously.

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Rules for Encoding

• The signals grouped into a field must be mutually
  exclusive.
• No two signals in the group can occur at the same
  time.
• The group must include a none of the above
  case.
• To allow for none of the signals being active.
• The signals grouped into different fields may
  occur simultaneously.

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Example

• Lets design a micro-programmed control unit for
  our example processor.
• We will use a vertical micro-instruction format
  with a single address field.
• Most common format.
• The format also must include a condition field
  and a branch field.

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Determining the Control Signals

• First, we need to review the RTL description and
  group the operations according to the two rules
  mentioned earlier.
• We need to look at the control signal level, not
  just the micro-operation level.
• As an example, the following microoperation
• AC ? AC DR
• translates into the following three control
  signals
• AC_LD, ALU_ADD, and Bus control to select DR
  output.

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Example

• The following is a list of all of the control
  signals

• ALU_AC_CCOMP
• ALU_E_COMP
• ALU_SHR
• ALU_SHL
• ALU_AND
• ALU_ADD
• Note There is no need for a sequence counter
  therefore, its signals are removed.

• DR_CLR
• IR_LD
• TR_LD
• TR_INC
• TR_CLR
• OUTR_LD
• R_SET
• R_RST
• IEN_RST
• IEN_SET
• E_RST
• S_RST
• FGI_RST
• FGO_RST

• S0, S1, S2
• MEM_RD
• MEM_WR
• AR_INC
• AR_LD
• AR_CLR
• PC_INC
• PC_LD
• PC_CLR
• AC_LD
• AC_INC
• AC_CLR
• DR_LD
• DR_INC

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Example

• A total of 34 control signals
• They can be grouped based on resource
• The signals for the AC together, etc.
• They can be grouped based on exclusivity
• The signals that can never occur together in one
  group.
• For our example, if we use the first approach we
  will have 17 groups
• BUS MUX, memory, AR, PC, AC, DR, IR, TR, OUTR, R,
  IEN, AC, ALU, E, S, FGI, and FGO.

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Example

• However, given the RTL code, we can group some of
  the smaller groups together to further reduce the
  size of the memory.
• For example, the OUTR_LD and FGO_CLR signals
  always occur together. They can be stored as one
  signal.
• The IR_LD occurs only once in the entire code. It
  can be coded with some other group.
• As long as the group does not contain PC_INC.

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Control Signal Grouping

• We can reduce the groups to
• Group 1
• S0, S1, S2
• 3 bits
• Group 2
• AR_INC, AR_LD, AR_CLR
• PC_INC, PC_LD, PC_CLR
• E_RST
• NOP
• 3 bits

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Control Signal Grouping

• Group 3
• AC_INC, AC_LD, AC_CLR
• DR_INC, DR_LD, DR_CLR
• IR_LD
• NOP
• 3 bits
• Group 4
• MEM_RD, MEM_WR
• TR_INC, TR_LD, TR_CLR
• R_RST, R_SET
• NOP
• 3 bits

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Control Signal Grouping

• Group 5
• ALU_AC_COMP, ALU_E_COMP, ALU_SHR, ALU_SHL,
  ALU_AND, ALU_ADD
• OUT_LD
• NOP
• 3 bits
• Group 6
• IEN_RST, IEN_SET
• S_RST
• FGI_RST
• FGO_RST
• 2 NOP
• 3 bits

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Control Signal Grouping

• The result now is 6 groups of 3 bits each.
• Total is 18 bits for the control signals.
• Compare this to a total of 34 bits for pure
  horizontal format
• Compare it with 17 groups for simple encoding.
• The next step is to assign a code for each of the
  signals in each of the groups.
• Simple, straight forward.

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The Micro-Instruction Format

• So far, we can draw the following as the starting
  point of our micro-instruction
• As a result of this format, the control unit must
  include 6 3-to-8 decoders to decode the fields
  into the original individual signals.

GRP4
GRP5
GRP6
GRP1
GRP2
GRP3
Next Address Information
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Example Microinstruction

• Using the previous format, the signal part of the
  following microinstruction
• IR ? MAR, PC ? PC 1
• is represented by
• 111 100 111 001 000 000 ------------