A Microprogrammed Datapath

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A Microprogrammed Datapath

• Laxmikant Kale
• http//charm.cs.uiuc.edu
• Parallel Programming Laboratory
• Department of Computer Science
• University of Illinois at Urbana Champaign

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A Microprogrammed Datapath

• The datapath we worked with for the past few
  weeks was just an example
• We will look at another datapath today
• To emphasize that alternate designs are possible
• To show an example where each instruction takes
  multiple cycles to finish
• To show a different way of generating control
  signals

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Why multiple cycles?

• Wouldnt it be slower?
• Not necessarily if each clock cycle can be made
  shorter
• Variable number of cycles for instructions (some
  2, some 5)

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New Datapath

• Let us use one memory module
• for both data and instructions
• Allow for multiple cycles for each instruction

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Register File
MUX B
MUX M
ALU
Memory
Data In
Address
Data Out
MUX D
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Consequences of this datapath

• Needs a cycle to fetch instruction from memory

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How to generate contol signals

• Control word
• In our older datapath
• Control word was determined fully by the
  instruction
• Here
• It depends on instruction and on which cycle
  within the instruction we are in
• Example

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Generating control sequential circuit
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IR Instruction Register
Control Unit
Control word
Cycle Counter
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IR Instruction Register
Microprogram Memory
Control word
Next MicroInstruction Address
MicroProgram Counter
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