101 Introduction to Digital Integrated Circuits - PowerPoint PPT Presentation

1 / 8
About This Presentation
Title:

101 Introduction to Digital Integrated Circuits

Description:

... of output configuration (1) open collector, (2) totem pole, and (3) tristate ... Tristate: allows totem poles to be connected in wired output logic (normally ... – PowerPoint PPT presentation

Number of Views:394
Avg rating:3.0/5.0
Slides: 9
Provided by: roberths
Category:

less

Transcript and Presenter's Notes

Title: 101 Introduction to Digital Integrated Circuits


1
10-1 Introduction to Digital Integrated Circuits
  • Several different families (were concentrating
    on TTL)
  • Basic gate is the NAND
  • first need to understand RTL and DTL (historical
    value)
  • npn and pnp emitters, bases and collectors
  • difference between bipolar and unipolar
  • fundamental fact vacuum tubes and transistors
    are active circuits which electronically control
    the flow of electrons

2
10-2 Special Characteristics
  • Fan-out how many gates can you hook to the
    output of another gate
  • Power dissipation how much heat can a transistor
    tolerate before it melts down
  • Propagation delay time it takes a signal to
    propagate from input to output (note could be
    different for HIGN and LOW)
  • Noise margin how much unwanted voltage can a
    signal absorb without causing confusion as to its
    identity

3
10-3 Bipolar Characteristics
  • Concentrate on npn type
  • electron flow vs. conventional current flow
    (Franklin)
  • arrow points in direction of conventional current
    flow
  • need to have a load resistor to prevent burn up
  • Kirchoff law base current emitter current
    collector current
  • pumping one electron out of base allows 50
    electrons to flow from emitter to collector
    (Beta, or hfe
  • base current will flow when forward bias gets
    over 0.6 volts

4
10-3 (contd)
  • Transistors can operate in one of three
    conditions (1) cutoff, (2) saturation, or
    (3) active
  • if deep into saturation, there may be a delay is
    going to cutoff
  • go over example on page 408 (this describes the
    procedures for determinine in which condition the
    transitor is operating)

5
10-4 RTL and DTL circuits
  • Basic gate of RTL is NOR low is 0.2v high is
    1.0 to 3.6v 12 mW 25nsec no longer used
  • discuss Fig. 10-8
  • Basic gate of DTL is NAND low is 0.2v high is
    4.0 to 5.0v 12 mW 30nsec fanout 8 NM of 1v
  • discuss Fig. 10-9 (note two diodes)
  • replace one diode with a transistor for Fig.
    10-10 this improves fanout

6
10-5 TTL Logic
  • TTL has gradually evolved to Advanced Low Power
    Schottky TTL
  • speed-power product (in pico Joules)
  • for fast speed, you need to reduce storage time
    and also reduce the RC time (but lowering R
    increases P)

7
10-5 (contd)
  • Three types of output configuration (1) open
    collector, (2) totem pole, and (3) tristate
  • discuss Figs. 10-11, 12, 13 showing how open
    collector can be formed into a common bus
  • Totem pole improves propagation delay (from 35 to
    10nsec) it replaces the load resistor with a
    transistor and a diode which sit on top of the
    output transistor (and acts as a pull up
    circuit) this greatly lowers the effective R,
    thus lowering the RC time constant.
  • Schottky prevents the diode (or transistor) from
    going into saturation thus it is not delayed in
    going to cutoff it is constructed by putting a
    semiconductor next to metal note the distinctive
    symbol

8
10-5 (contd)
  • See Fig. 10-15 Q4 qne Q5 form a Darlington pair
    this gives high current gain with low resistance
    and decreases low to high propagation delay
  • Tristate allows totem poles to be connected in
    wired output logic (normally forbidden) has a
    control input (C) when C goes low then the
    output is at high impedance (and is effectively
    out of the circuit)
Write a Comment
User Comments (0)
About PowerShow.com