ECE 510 FM1 Synthesis and Verification of Finite State Machines Lecture 1' Class Overview

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ECE 510 FM1Synthesis and Verification of Finite
State MachinesLecture 1. Class Overview

• Alan Mishchenko
• http//www.ee.pdx.edu/alanmi/
• alanmi_at_ee.pdx.edu

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Our Plans for Today

• Introduction
• Project possibilities
• Detailed overview of the class material
• Comments and opinions
• Visual software demonstration

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ECE 510 FM1 Structure

• lt1gt Lectures 1-6 (6). Fundamentals of FSM design
• lt2gt Lectures 7-10 (4). Minimization and encoding
• Classical minimization and encoding algorithms
• Recent contributions to the field
• Binary Decision Diagrams
• lt3gt Lecture 11-14 (4). High-level representations
• New efficient synthesis from timed constraints
• Applications to verification, protocol design,
  robotics, etc
• lt4gt Lecture 15-18 (4). Advanced subjects
• FSM factorization and decomposition
• Verification and Symbolic Model Checking
• Sequential dont-cares, FSM networks, etc.

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Organization of the Class

• Lectures twice a week
• Attendance
• Lecture notes (references to textbook chapters)
• Given in advance (usually one week before the
  class)
• PowerPoint Slides (PDF transparencies)
• Available from the class homepage in the morning
  on lecture days
• Occasional home work
• Helps you understand the presented material
• Projects

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Project Possibilities

• FSM Design Option
• Design a reasonably complex FSM using industrial
  CAD tools
• Software Development Option
• Implement an FSM minimization, encoding,
  verification, decomposition algorithm using
  Visual C
• Theoretical Option
• Study recent IEEE publications and write a
  research paper presenting a new (improved) FSM
  algorithm
• Continuation Option
• For students who took Advanced Logic Synthesis
  Class and/or Design and Test Class in Fall 1999

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Questions

• What material, mentioned in the overview, is
  useless (boring) and may be excluded?
• What material, not mentioned in the overview, may
  be included?
• What is your preferred project option?
• What are your suggestions about organization of
  the class?

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Lecture 1. January 6Class Overview

• Introduction
• Project possibilities
• Detailed overview of the material
• Comments and opinions
• Visual software demonstration

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Lecture 2. January 11 Fundamentals of FSM design

• FSM specification methods
• Clocking schemes and flip-flops
• Traditional FSM design flow
• Innovative approaches to FSM design
• Design for layout, design for testability, design
  for verification

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Lecture 3. January 13Flip-flops and reliability

• Importance of flip-flop timing properties in
  designs and design methodologies
• Transparent flip-flops (latches) and
  non-transparent flip-flops (MS-ffs,
  edge-triggered ffs, lock ffs)
• Timing diagrams of the basic types of flip-flops
• Flip-flop parameters important to avoid critical
  races and hazards
• Characteristics of memory units and the
  complexity of design algorithms

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Lecture 4. January 18Behavioral specification
of FSMs using autograms

• Specification of FSM states, inputs, and outputs
  in the autogram
• Types of autogram lines and their use
• Transformation of autograms targeting a given
  implementation technology
• A detailed example of autogram specification of
  an FSM

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Lecture 5. January 20The basic FSM synthesis
method

• Filling out the FSM data card
• Deriving the formulas for next-state and output
  logic
• Implementation of hazard-free outputs
• Accounting for various flip-flop types and state
  encodings in the autogram
• Basic FSM synthesis using SYNTHA

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Lecture 6. January 25Synthesis of FSM using
universal blocks

• The universal block as a reusable part of the FSM
  design
• Universal blocks of continuous and interrupted
  types
• Movement functions and their use in FSM design
• Exploring the wealth of movement functions using
  TRACE

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Lecture 7. January 27Introduction to Binary
Decision Diagrams

• Decision tree reduction rules
• Boolean function manipulation using BDDs
• Overview of operations implemented in a BDD
  package
• Characteristic functions and relations
• Explicit and implicit algorithms
• A case study of a cube-based and a BDD-based
  algorithm

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Lecture 8. February 1State minimization of
completely specified FSMs

• The problem formulation
• State-equivalence checking
• BDD-based representation of FSMs
• Computing the equivalence relation
• Computing the classes of equivalent states
• Transforming the transition and the output
  relations

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Lecture 9. February 3State minimization of
incompletely specified FSMs

• The problem formulation
• Compatibles, prime compatibles, and maximal
  compatibles
• Binate covering problem
• An outline of the implicit solution

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Lecture 10. February 8FSM state encoding

• The criteria of optimality
• The fanin- and fanout- oriented algorithms
• The constraint based encoding
• Integral approaches to state minimization and
  state assignment

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Lecture 11. February 10High-level specification
of FSMs using L language

• Introduction to the language of timing
  constraints
• Interpretation of timing constraints on the
  extended K-map
• Examples of specification using L language

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Lecture 12. February 15Preliminary discussion
of projects
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Lecture 13. February 17Synthesis of FSM STGs
from L language

• The main concepts used in L-language synthesis
• BDD-based synthesis from L language using BDDs
• Experiments with DUAL

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Lecture 14. February 22Additional aspects of
high-level FSM synthesis

• Determinization of high-level specifications
• Synthesis-oriented transformations of high-level
  specifications
• Compatibility check of the device and its
  environment
• Applications of L language in hardware synthesis,
  protocol design, model checking, robotics

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Lecture 15. February 24FSM factorization and
decomposition

• Partition theory (by J.Hartmanis and R.E.Stearns)
  
• FSM factorization (by S.Devadas)
• General decomposition (by L. Jozwiak)

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Lecture 16. February 29FSM equivalence checking
using reachability analysis

• Symbolic image computation
• Transition relations and the product machine
• Symbolic FSM traversal

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Lecture 17. March 2Symbolic model checking

• Temporal logic, fixed points
• The input language of SMV system
• Verification of distributed cache protocol

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Lecture 18. March 7FSM networks

• Permissible behavior in networks of interacting
  FSMs
• Optimization of FSMs using don't care sequences
  in FSM networks

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Please answer the following questions

• What are your professional interests?
• What material, mentioned in the overview, is
  useless (boring) and may be excluded?
• What material, not mentioned in the overview, may
  be included?
• What is your preferred project option?
• What are your suggestions about organization of
  the class?