BORPH: Berkeley Operating System for ReProgrammable Hardware

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BORPH Berkeley Operating System for
ReProgrammable Hardware

• Hayden So
• BWRC Winter Retreat
• 1/13/2003 Monterey, CA

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What is BORPH?

• BORPH is an operating system, implemented on
  reprogrammable hardware system, managing resource
  on that system.
• BORPH is an ideology a believe that by
  abstracting lower level hardware details, overall
  system performance increases.
• BORPH is a design methodology that shorten
  development cycle for complex hardware platforms.

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Why BORPH? (1)

• Traditionally, OS was developed to manage
  hardware resources
• Modern Reprogrammable hardware is too big, too
  powerful for one designer to manage/utilize
• Latest Xilinx FPGA has millions gates
• BEE supports concurrent Mega Operations per
  second
• BORTH manages these resources
• Abstraction
• Sharing among processes/users
• Common library functions

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Why BORPH? (2)

• BORPH provides abstraction
• Abstraction is crucial for large system
• BORPH provides familiar UNIX syscall
• sys_read, sys_write, sys_signal
• BORPH provides familiar UNIX functions
• Interrupt
• Signal
• It makes designers life easier

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Typical HW Design Problem
Custom/Open Bus

• Ad-hoc system design most of the time
• Custom interface does not survive ECO
• No/Insufficient co-design environment
• Correlated error
• difficult to debug
• Not scalable

uP
Memory
ASIC1
D/A
ASIC2
DSP
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BORPH System Layout on BEE
Strong ARM
Kernel Core
Device Driver
Device (UWB)
Device Driver
USB Flash Ethernet
FPGA
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Features of Current Version
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Example Console I/O dataflow

• User read(stdin, char)
• Syscall generator sys_read(/dev/console, char)
• Syscall handler receives sys_read
• Call fops-gtread from ARM driver

• User write(stdout, char)
• Syscall generator sys_write(/dev/console, char)
• Syscall handler receives sys_write
• Call fops-gtwrite from ARM driver

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Software Analogy
Design Concept
Design Concept
Design Concept
UNIX process
BORPH process
Various CAD Tools
System Call
BORPH Syscall
Device Driver
Device Driver
Hardware Device
FPGA gates
FPGA gates
SW
HW
Hybrid
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Future Scalable OS

• Decentralized Kernel control
• Cause problem with interrupt, signal
• Cause problem with process synchronization
• Use virtual circuit techniques
• Route OS call/signal through individual FPGA
• More OS Features
• Process Stop/Resume
• Dynamic Process Relocation
• Memory Management
• Synchronization Management