Infrastructures services like CMP: where should they be heading

1
Infrastructures services like CMP where should
they be heading?
Bernard COURTOIS
CMP, 46 avenue Felix Viallet, 38031 Grenoble
Cedex, France

• http//cmp.imag.fr

2
Agenda
? Infrastructures background - Integrated
circuits _at_ CMP - MEMS _at_ CMP - Advanced
processes _at_ CMP - IPs _at_ CMP ? Infrastructure
services in the world ? Conclusions today
cooperation tomorrow nanoelectronics, 3D, other
communities,... ? Final conclusions
3
Infrastructures background
Education Research in Computer
Science. computers! Education Research in
Microelectronics. Circuits! Late 70s/early 80s
MPC/MPW infrastructures for integrated circuits
manufacturing.
4
Motivation
Why? to well educate students, who will become
good engineers to produce good
researchers to provide SMEs with small volume
production How? sharing the wafers, to share
the cost sharing various needs
5
mass production circuits are cheap because of
batches of hundreds of wafers few
circuits shared wafers Universities, SMEs,
... prototyping, low volume
Shared cost wafer
Prototypes or low volume production
6
Generalities on CMP

• CMP created in 1981
• industrial quality process lines (University
  process lines cannot offer a stable yield)
• design kits to link CAD and MPW, to facilitate
  the design.
• Customer base development
• Universities / Research Labs
• Industry
• 1000 Institutions in 70 countries
• Non-profit, non-sponsored

7
Technical development

• 19811982 launching CMP with NMOS
• 19831984 development of NMOS, launching
  CMOS
• 19841986 development of CMOS
• 19871989 abandon NMOS, increase the
  frequency of CMOS runs
• 19901994 launching Bipolar, BiCMOS, MESFET
  GaAs, HEMT GaAs, advanced CMOS (.5 µ TLM) and
  MCMs
• 19951997 launching CMOS, BiCMOS and GaAs
  compatible MEMS, DOEs, deep-submicron CMOS
  (.25 µ 6LM)
• 1998 launching surface micromachined MEMS,
  abandon MESFET GaAs
• 1999 launching SiGe, .18 µ CMOS
• 2001 .35 µ HBT SiGe BiCMOS, .12 µ CMOS
• 2003 PolyMUMPS, MetalMUMPS, SOIMUMPS
• 2004 90 nm CMOS, BCD-SOI
• 2005 ASIMPS, SUMMIT/SANDIA
• 2006 65 nm CMOS, 0.6 µ CMOS Bulk
  Micromachining
• 2008 45 nm CMOS, 65 nm SOI

8
Summary of services one stop shop
ICs
austriamicrosystems 0.35 µ CMOS 0.35 µ
SiGe 0.35 µ CMOS-Opto 0.35 µ CMOS
HV 0.35 µ CMOS HV EEPROM
STMicroelectronics 45nm CMOS 7LM 65nm
SOI 65nm CMOS 7LM 90nm CMOS 7LM 130nm
SOI 130nm CMOS 6LM 0.35 µ SiGe
BiCMOS 0.25 µ SiGeC BiCMOS
OMMIC 0.2 µ HEMT GaAs HEMT
MEMS
CMP/austriamicrosystems 0.35 µ CMOS bulk
micromachining
CMP/ OMMIC 0.2 µ HEMT bulk micromachining
SANDIA SUMMiT V
MEMSCAP PolyMUMPS MetalMUMPS SOI-MUMPS
9
Summary of services one stop shop (contd)
CAD Tools Tanner, ARM , Mentor Graphics,
SoftMEMS IP exploitation ARM cores on
STMicroelectronics processes (0.12 µ and 65nm)
- 110 Universities Design kits more than 35
different kits
Packaging Ceramic, plastic, custom ...
various subcontractors
Testing various subcontractors
10
MEMS Manufacturing _at_ CMP
mechanical structures MEMS ? Bulk
micromachining MEMS Electronics Mechanical
structures on the same chip ? Specific MEMS
processes Complex mechanical structures
11
Bulk Micromachining
Process Technology
0.25 µm BiCMOS process from STMicroelectronics ?
5 Metal layers ? Top thick Metal ? Convenient
for RF (RIE DRIE) etching post
process ASIMPS from CMU (Carnegie Mellon
University)
0.6 µm CMOS process from CSMC ? 2 Polysilicon
layers ? 2 Metal layers Humid TMAH
etching post process
Bulk micromachining cross section
ASIMPS overview
12
Bulk Micromachining
Application examples

• Accelerometers
• Gyroscopes
• Radio frequency (RF) MEMS
• Communication systems (with resonator
  oscillators, RF filter and High-Q inductors),
• Infrared sensors and imagers
• Electro thermal converters
• Force sensors
• Multiple accelerometers integrated on 1 chip

13
Specific MEMS Processes
Process Technology
MUMPS family, from MEMSCAP ? PolyMUMPS
Gold surface micromachining ? SOIMUMPS On
SOI substrate ? MetalMUMPS Thick Nickel
electroplated
SUMMiT V, from Sandia ? Ultra Planar process ?
5 Polysilicon layers, all planarized ?
Mechanical robustness
PolyMUMPS cross section
SUMMit V cross section
SOIMUMPS cross section
14
Specific MEMS Processes
Application examples

• Comb actuators
• Meshing gears
• Transmissions dynamometers
• Laminated support springs
• Steam engines
• Micro engines and micro machines
• Motors
• Mirrors and optical encoders
• Micro sensors
• RF MEMS

15
MEMS Manufacturing _at_ CMP
MEMS processes available

• ? CMP portfolio is large enough to imagine very
  complex mechanical structures with a solution
  for the fabrication
• Designs can be complex either with the
  electronics management and control of the MEMS
  or in the movable structures
• Design Kits are provided on request
• CMP gives some support on MEMS design

16
Advanced processes _at_ CMP
130 nm 2001 250 ICs to date 90 nm 2004 242
ICs to date 65 nm 2006 57 ICs to date 45
nm 2008 2 ICs to date Total 551 ICs to date
17
130 nm
Institutions having submitted circuits 130nm CMOS
18
90 nm
Institutions having submitted circuits 90nm CMOS
19
65 nm
Institutions having submitted circuits 65nm CMOS
20
By geographical area
21
By the time
22
IPs _at_ CMP
? austriamicrosystems and STMicroelectronics
blocks ? ARM tools
Licences
Centres
23
ARM tools users
Europe 79 Americas 7 Asia 14 RoW 7 117
worldwide
ARM Cores
ARM 946 on ST .13µ all ARM cores on ST 65 nm
24
Infrastructure Services in the world
? Pioneering efforts ? First cooperative
initiatives ? National Services in the world
25
Pioneering efforts 70s 80s
Australia 1982 1982-1984 2 services CSIRO
JMRC NMOS CMOS ( 1985) AUSTEK no central
organisation ES2, ORBIT, AWA, CMP Belgium 1986 A
RAMIS UCL CMOS 3µ S01 CMOS 3µ IMEC process
stopped in 1991 MIETEC 2µ CMOS in 1989 1.5µ 2P
2M 3µ SDBiCMOS stopped its own operations in
1992 until 1992 61 runs, 620 designs
26
Brazil 1986 VTI 1988 linear
bipolar Sid-Microelectronics ES2 Canada 1984
CMC Northern Telecom CMOS 1.2µ, BiCMOS .8µ 20
GHz GaAs GENNUM CORP. bipolar linear
array 300 designs/year, 15 runs/year France 1981
CMP CMOS from ES2, AMS BiCMOS from
AMS Bipolar from TCS GaAs from VSC, PML .5µ
CMOS from STM (JESSI) prototype / small volume
27
Germany 1984 EIS SIEMENS AEG FhG ended
1987 Darmstadt ITT-Intermetall 1.2µ India Pla
ns DoE 3 levels level I central at DoE
New-Delhi level II Academic Institutions, R/D
labs UNDP Ireland 1984 NMRC CMOS .5µ
15V Italy 1988 SGS EC Special Action for
SMEs ES2, AMS
28
Japan Local agreements ASTEM (ES2) plans Korea
1990 Seoul National University 1.5µ CMOS 3-4
runs/year Seodu Logic ORBIT Malaysia 1985 MIMOS
Norchip, Australia plans Portugal INESC,
1982 FUNDETEC, 1989 Scandinavia 1981 NORCHIP VTI
, ES2 until 1993 99 runs, 1670 designs Now
Nordic VLSI (CHIPSHOP) CMOS from AMS
29
Spain 1986 CNM UCL CMP CMOS from
ES2 Switzerland MICROSWISS, EPFL/LEG SMEs CHIPS
HOP CSEM Faselec (CMOS LP) EM (CMOS) HMT
to STM ASCOM in Bipolar Republic of
China 1984 1991 2 runs CMOS 1.2 µ 1992 CMOS,
BiCMOS CIC (NSC) advanced processes industry
and academics, CMOS .8µ DP/DL and SP/DL, .8µ
BiCMOS educational processes CMOS .8µ SP/DM and
3µ DP/SM plans for n.6µ GaAs about 200 designs
so far The Netherlands ES2 DIMES metallizes
analog bipolar CMOS gate array, CMOS sea of gates
30

• United Kingdom
• Central Fabrication Facilities
• Universities of Southampton, Edinburgh,
  Sheffield for
• process, lithography at RAL
• Design and Test Centers, 1984
• ? commercial foundries Plessey, Ferranti, GEC
• ULVC, 1986
• University of London
• ES2, CMP
• ECAD, 1986
• CAD
• Microelectronics in Business,
• 1993
• SMEs
• USA
• CALTECH shared wafers
• MEAD/CONWAY, 1978 9 Universities

31
First cooperative initiatives
EUROMOS CMP, Darmstadt, Norchip,
NIHE 1985 Protocol of Grenoble CMP, EIS,
NORCHIP, IMEC, NELSIS, ARMIS, PE-Micro 1987 EUROC
HIP CHIPSHOP (EUROPRACTICE)
32
National Services in the world
CIC Taïwan CMC Canada CMP France ICC
China IDEC Korea MOSIS USA VDEC Japan
33
CIC Taiwan 1992 E, R, I CMOS 0.13µm 1-poly
8-metal TSMC (3 runs/year) CMOS 0.18µm 1-poly
6-metal TSMC (5 runs/year) CMOS 0.18µm 1-poly
6-meta UMC (6 runs/year) CMOS 0.35µm 2-poly
4-metal TSMC (5 runs/year) CMOS 0.35µm 2-poly
4-metal MEMS post-fabrication ITRI (5
runs/year) SiGe BiCMOS 0.35µm 3-poly 3-metal TSMC
(4 runs/year) GaAs 2.0µmHBT GCTC (1
run/year) GaAs 0.15µm PHEMT WIN (2 runs/year)
34
CMC - Canada 1984 5 year contracts from
NSERC E, R 90-nm CMOS STMicroelectronics
through CMP 0.13 µ CMOS IBM through MOSIS 0.18 µ
CMOS TSMC through MOSIS 0.35 µ CMOS TSMC through
MOSIS 0.5 µ SiGe BiCMOS, 5AM 5HP TSMC through
MOSIS 0.8 µ CMOS in three process flavors
high-voltage- DALSA Semiconductor -up to 300V,
mid-voltage range--/-20V, and standard-voltage--
2.7V to 5.5V 2.5 GHz Bipolar linear array Gennum
Corporation PolyMUMPs surface micromachining
process MEMSCAP through CMP MetalMUMPs MEMSCAP
through CMP Micragem SOI-based micromachining
process Micralyne Generalized MEMS
process Protolyne for semi-custom microfluidics
device Micralyne Generalized MEMS
process Protolyne for semi-custom microfluidics
devices Micralyne Photonics/optoelectronics throug
h Canadian Photonics Fabrication Centre
35
ICC China 2000 1996 2000 Fudan University E,
R, I CSMC 0.6um CMOS Chartered 0.35um
CMOS Chartered 0.25um CMOS Chartered 0.35um
SiGe TSMC 0.18um CMOS TSMC 0.25um CMOS TSMC
0.35um CMOS SMIC 0.18um CMOS SMIC 0.35um
EEPROM HJTC 0.18um CMOS HJTC 0.25um CMOS HJTC
0.25um EEPROM
36
IDEC - Korea 1995 IDEC Chip Design Contest E,
R CMOS 0.35 µ, 1-poly 4-metal Samsung
Electronics CMOS 0.18 µ, 1-poly 4-metal Samsung
Electronics CMOS 0.35 µ, 2-poly
4-metal Magnachip/Hynix CMOS 0.18 µ, 1-poly
6-meta Magnachip/Hynix CMOS 0.18 µ, 1-poly
6-metal Dongbu Electronics InGaP HBT Knowledge-on
37
MOSIS - USA 1981 1995 E, R, I Agilent/HP
(Avago) 0.5µ CMOS AMI Semiconductor 0.35µ, 0.5µ,
0.7µ, 1.5µ CMOS IBM 90nm, 0.13µ, 0.18µ and
0.25µ CMOS 0.13µ, 0.18µ, 0.25µ, 0.35µ and 0.5µ
SiGe BiCMOS TSMC 0.13µ, 0.18µ, 0.25µ, 0.35µ
CMOS Austriamicrosystems through CMP 0.35µ CMOS
0.35µ HV CMOS 0.35µ SiGe BiCMOS
38
VDEC - Japan 1996 E, R I (STARC) 2-poly
2-metal CMOS 1.2 µ SCG Japan Ltd (OnSemiconductor
Ltd) 2-poly 3-metal CMOS 0.35 µ Rohm Co.
Ltd 1-poly 5-metal CMOS 0.18 µ Rohm Co.
Ltd 1-poly 5-metal CMOS 0.18µ Hitachi Ltd 2-metal
0.8µ bipolar NEC Compound Semicond Devices
Ltd 1-poly 5-metal CMOS-SOI 0.15 µ Oki
Electric 1-poly 6-metal CMOS 90
nm ASPLA VDEC-MOSIS CMOS 0.25µ/0.18µ TSMC VDEC-MOS
IS Si-Ge BiCMOS 0.5µ IBM
39

• All of them same legal status
• non profit
• hosted at Universities

40
Conclusions
41
Service Organizations
? Today cooperation ? Tomorrow where should
they go?
42
Today

• CMP is doing well
• More circuits 25 from 2005 to 2006, 22 from
  2006 to 2007
• 45nm, 65nm SOI in 2008, (32nm)
• certified ISO 9002 in 2000but no single service
  organization can offer a very large portfolio
• Very advanced processes
• Niche processes
• ? Cooperation is a must

43
Present cooperative effortsCMC, CMP, MOSIS

• Why?
• To better serve the customer base by providing
  access to a larger technology selection.
• How
• Share the cost of expensive and/or unique
  processes with limited customer base
• Combine submitted designs into a common run,
  operated by one of the partners
• If technologies are accessed by the individual
  groups, the customer base may be too small to
  support the technology, whereas combining the
  customers from all groups may be adequate to
  support the technology in question.
• Expand the IP basis when technologies are
  shared in view of SoC/SIP design.

44
The cooperation in action

• ? MOSIS IC processes offered by CMP
• IBM 0.5 µ SiGe, 0.25 µ SiGe
• ? CMP IC processes offered by MOSIS
• austriamicrosystems 0.8 µ SiGe, 0.35 µ SiGe
• OMMIC 0.2 µ HEMT
• ? CMP IC processes offered by CMC
• ST 90nm, 65nm, 45nm
• ? CMP MEMS processes offered by CMC
• MEMSCAP PolyMUMPS, SOIMUMPS, MetalMUMPS

45
Other Agreements with CMP

• ? IDEC, Korea
• ? ICC, China
• ? CIC, Taïwan (in progress)
• All Swedish Universities
• FAPESP, Sao Paulo state in Brazil
• ? Distributors

46
Cooperation among Service Organizations
CMC
CMP
IDEC
MOSIS
VDEC
CIC
47
Service Organizations like CMP
Where should they go? ? Nanofabrication? ?
Nanoelectronics ? Other communities, e.g. BioMed
48
Nanofabrication? cf. Nanoscale Science Research
Centers, DoE MNT entry points? no value added
49
Nanoelectronics
? complexity ? diversification
50
Necessity for still increasing the complexity (
devices AND functionality) is still a
reality. How ? downsizing not for sure because
of cost and acceptance. Anyway reaching a limit
sooner or later. practical power density,
temperature, variability, leakage power,
analog design, costs cost of fabs and cost
of manufacturing if not in (very) large
volumes fundamental thermodynamics, quantum
mechanics, electromagnetics, ? larger die
sizes, possibly on not the most possible
advanced processes (current-generation
geometries) ? 3D packaging, 3D process
51
3D (packaging, process)
- mixed-technology integration best process
for each part (layer), - cost use of
current-generation geometries
52
3D Si TSVs In addition - interconnects
shorter, so power savings, increased
performance - I/Os less I/Os, so less
power - increase the level of modularity and
reusability dedicated TSV slices in various
technologies
53
but - thermal issues increased density, so
potentially hot spots, electromigration
acceleration - no power savings if use of
current-generation geometries - CAD software
including TSVs - thermal management theory
multiple sources (SABRY)
54
3D organic electronics 3D Si plus - cheap -
large area - mixed applications electronics,
sensors, RFID, PV, batteries, as in 3D Si -
folded, stacking of layers - flexible -
biocompatible for BioMed applications
55
Example multilayer polymer microsensor system B.
KAMINSKA et al, SFU, Canada IEEE Trans. on BIOCaS
courtesy of B. KAMINSKA
56
Prototype ECG and body positioning
Flexibility skin tissue conformity
57
Necessity for diversification ? heterogeneous
processes MEMS in general, microfluidics,
optics, photonics, etc. ? going after other
communities BioMed
58
BioMed community
Why? better health for everybody population
aging.... How? EE, CS, early 80s
infrastructures for ICs manufacturing decoupling
process design ? VLSI revolution BioMed take
advantage of similar infrastructures, Education,
research low cost not any kind of
applications standard processes many
applications, no process involvement needed
interface decoupling electronics-biomed
knowledge
59
Examples of ICs and MEMS for BioMed (another
talk....)
Examples of applications using standard
processes - no custom process - design only
CMOS for Neurosciences CMOS for
prosthesis Bulk micromachining (ORL)
MUMPS blood sampling microgripper for cell
manipulation CardioMEMS PillCam
ASIMPS bone stress sensor System view
science and beauty
60

• From G.E. MOORE,
• Cramming more components onto integrated
  circuits,
• Electronics, Volume 38, Number 8, April 19, 1965

61
Present developments
MEMS _at_ CMP for many years Microfluidics,
photonics _at_ CMC 3D _at_ CMP, first run expected
Feb 2009
62
Final conclusions
More more than Moore than more Moore Other than
Moore communities Be aware of globalization
63
Globalization

• Every country or continent is a high cost country
  or continent to another one at the time of global
  markets. Moving dynamically and quickly.
• Keep students, researchers, industrialists ahead
  of others
• Train on advanced processes and design
  methods, go for challenging issues

64
Nobody is safe
ADIDAS will move manufacturing from China to
India, Laos, Vietnam, Le Monde, August
2008 Outsourcing the outsourcing.
65
Herald Tribune 25 September 2007