TTCS electronics progress at Sun Yatsen University

1
TTCS electronics progress at Sun Yat-sen
University
Jiangqun Ni, Xiaohua Jian ,Zixin Wang, Chenpei
Tang
Jack Wang, SYSU
2
TTEC Board
The hardware is produced, with design identical
to VKs.
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TTEC board program progress
Next page is my test configuration of MCU program
and Logic FPGA program
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TTEC Test configuration
1.1st test by VK with 1 EPPCAN. 2.Further test
by 4 JMDC simulators for several weeks.
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TTEP board design is ongoing

• 1. 1st VER EM PCB has been delivered to VK, but
  most likely subjected to modification depending
  on the updated thermal requirements.
• Inductors work at magnetic field of about 300 Oes
  is to be procured.
• Thermal simulation of TTEP boards started (the
  power of assumption of about 10W).

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Temperature distribution of TTEP in Preliminary
simulation
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TTPP board design will be started when interface
specifications are available

• Pressure sensor interface specification is
  available.
• Pump interface specification is just received.
• Valve interface specification is not yet
  received.

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Schedule

• TTEC function integration and test will be
  implemented in 3 months.
• The TTEP PCB design will be finished in 1 month
  after the thermal requirements and inductor
  geometrical size are updated.
• The TTPP PCB design will be finished in 3 weeks
  after all the requirements are available.

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Thank you!
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Issues of the inductor core