CSE246 Adder

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CSE246Adder Part II

• Instructor
• Prof. Chung-Kuan Cheng

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Zimmermans Heuristic Approach

• Problem formulation
• Given depth constraint, generate a parallel
  prefix adder of minimum size
• Two step Heuristic
• Start with a serial prefix adder
• Compress to a fastest prefix structure at the
  cost of increasing size
• LSB to MSB, low level to high level
• Expand to reduce size, subject to depth
  constraint
• MSB to LSB, high level to low level

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Zimmermans Heuristic Approach

• Local compression/expansion operation
• Up/down shift

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Zimmermans Heuristic Approach

• Advantages
• Simple and fast
• Product depth-size optimal result in many cases
• Handles non-uniform input arrival times
• Disadvantage
• No guarantee on optimality

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Prefix Adder with arbitrary input arrival time
profile

• Non-uniform input arrival times represented in
  real number
• How to construct the fastest prefix adder under
  arbitrary input arrival time profile?

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Cont

• Timing model
• All (G,P) generators have the same delay C
• Denote the output timing of generator (G,P)ij
  as tij
• Suppose in the prefix graph, (G,P)ij is
  generated from (G,P)jk and (G,P)k-1j, then

tij maxtik , tk-1j C
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Dynamic Programming The idea

• Image a full array of partial prefix results
• All (G,P) signals of length i are on level i
• Rightmost signals are wanted prefix results
• Generate all the (G,P) signals row by row, from
  lower level to higher level
• For each (G,P) signal, find the scheme that leads
  to best timing, i.e., find the partition point k
  such that

tij minmaxtik , tk-1j C
tnn
tn-1n-1
t11
t22
k
tnn-1
t21
tnn-2
t31
tn2
tn-11
tn1
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Dynamic Programming

• A 5-bit example

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Dynamic Programming

• Complexity
• For (G,P)ij, search (i-j) combinations
• Overall O(n3)
• Hints for reducing complexity
• For (G,P)ij, there might more than one optimal
  partition points, but we want just one
• At least one optimal partition point of
  (G,P)ij is bounded by the optimal partition
  points of (G,P)i-1j and (G,P)ij1

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Backward Reduction I

• Some of the partial prefix results are not used,
  hence can be removed

Level 1
Level 2
Level 3
Level 4
Level 5
(a)
(b)
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Backward Reduction II

• Some nodes may be over tightened, and can be
  relaxed to reduce area

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A missing detail

• (G,P) signals allows overlap ? search space
  increases
• However, allowing overlapping does not produce
  better timing

(G,P)ij (G,P)ik (G,P)lj
l k
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Function level optimization

• Carry Skip Adder

If p3,0p3p2p1p0 1, then x cin
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False Path

• A1 lt- MUX lt- A0 lt- cin is a false path
• If carry is from cin, then block must have
  p3p2p1p0 1
• Since p3,0 1, g3,0 must be 0
• The carry is not generated from A0
• The carry needs not to propagate via A0, it will
  go from the MUX

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False Path Cycles

• Cycles of False Paths Eg. 1s complement number
  addition
• Positive x
• Negative (2n-1)-x
• Addition
• (2n-1)-x (2n-1)-y 2n(2n-1)-(xy)-1

A3,0
B3,0
Cout
Cin
Adder
S3,0
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Example

• 000
• 11111 0
• 11111 0
• 111110
• 111111 0

• -3-5 -8
• 11100 -3
• 11010 -5
• 110110
• 110111 -8

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Multi-Operand Addition

• Carry save adder a (3,2) counter

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Example

• A (3,2) counter compresses X rows to 2/3X rows
  each time
• Tree structure in implementation

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Other Counters

• (7,3) counter

• (5,3) counter

S1
Ca
Cb
S0
S0
S2

• Design of (5,3) counter using full adders

Ca
Cb
S0