EECE Embedded System Design

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EECE Embedded System Design
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Memory

• For the memory, efficiency is again a concern
• speed (latency and throughput) predictable
  timing
• energy efficiency
• size
• cost
• other attributes (volatile vs. persistent, etc)

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Access times and energy consumption increases
with the size of the memory
"Currently, the size of some applications is
doubling every 10 months"
Example (CACTI Model)
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Access times and energy consumptionfor
multi-ported register files

• Rixners et al. model HPCA00, Technology of
  0.18 mm

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Reducing energy consumption with Sub-banking

• shorter wires,
• lower capacitances,
• faster access

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How much of the energy consumption of a system is
memory-related?
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CPU Power Dissipation
42/40 again memory-related !
IEEE Journal of SSC Nov. 96
Proceedings of ISSCC 94
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Access-times will be a problem

• Speed gap between processor and main DRAM
  increases

• early 60ties (Atlas)page fault 2500
  instructions
• 2002 (2 GHz µP)access to DRAM 500
  instructions
• ? penalty for cache miss about same as for page
  fault in Atlas

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Predictability is a problem (1)

• Embedded system systems are often real-time
  systems
• Have to guarantee meeting timing constraints.
• Predictability For satisfying timing constraints
  in hard real-time systems, predictability is the
  most important concernpre run-time scheduling
  is often the only practical means of providing
  predictability in a complex system Xu, Parnas
• Time-triggered, statically scheduled operating
  systems

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Predictability is a problem (2)

• Currently available caches dont solve the
  problem
• Improve the average case behavior
• Use non-deterministic cache replacement
  algorithms
• Scratch-pad/tightly coupled memory based
  predictability

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Hierarchical memoriesusing scratch pad memories
(SPM)
Hierarchy
Example

• Address space

no tag memory
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Comparison of currents using measurements
E.g. ATMEL board with ARM7TDMI andext. SRAM
/3
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Comparison of energy consumption
Example Atmel ARM-Evaluation board
Main memory access takes more cycles?savings
(86) larger than for current.
energy reduction/ 7.06
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Why not just use a cache ?

• Predictability?

Worst case execution time (WCET) may be large
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Why not just use a cache ? (2)

• Energy for parallel access of sets, in
  comparators, muxes.

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Influence of the associativity
Parameters different from previous slides
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Flash Memory Based on EPROM/EEPROM-Memory
EPROM storage cell
Row (j)
FG charged
FG not charged
Ground
Read amplifier
floating gate FG can be charged by high
voltage. Charged transistor non-conducting if row
selected. Discharging with UV light.
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EEPROMS storage cell
EEPROM electrically erasable read only
memory. EEPROM needs additional transistor per bit
Writing and erasing requires just electrical
signals
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NOR- and NAND-Flash

• NOR Transistor between bit line and ground
• NAND Several transistor between bit line and
  ground

contact
contact
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Properties of NOR- and NAND-Flash memories