Gated STM on Small Metallic Clusters

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Gated STM on Small Metallic Clusters
Luca Canali, Leonid Gurevich and Leo Kouwenhoven
Department of Applied Physics and Delft Institute
of Microelectronics and Submicron Technology,
Delft University of Technology, Lorentzweg 1,
2628CJ Delft, The Netherlands. E-mail
L.Canali_at_tn.tudelft.nl, see also
http//vortex.tn.tudelft.nl/upward/publications.h
tml
We present a novel scanning probe technique and
its applications to the study of small metallic
clusters. The probe consists of a nanofabricated
silicon nitride cantilever over which two Pt
electrodes have been evaporated (on the two
sides). One electrode acts as a tunnelling tip
for normal STM operations while the other acts as
a gate. We have used this probe to investigate
small metallic clusters by means of STM
topography and spectroscopy at low
temperatures. The scanning gate probe is
protected under patent No. NL1013671.
Gated Tip
The scanning gate (S-gate) sensor is mounted on a
low-temperature STM-head. First the S-gate is
used in STM mode to acquire topography and thus
locate the clusters on the substrate. Once a good
cluster is found, the S-gate is positioned over
it to acquire the gated spectroscopy. The typical
I-V characteristic (see graph) shows Coulomb
staircase behaviour, where the step size is a
measure of the cluster charging energy ( 20
meV). The cluster charge Qo can be varied
continuously by means of the gate electrode, the
current being e-periodic in Qo. The colour plot
shows a set of 51 I-Vs taken for different gate
voltages from 30 to 30 volts (stability
diagram). The tunnel current is represented in
colour. The blue area at the centre of the image
corresponds to the Coulomb blockade of transport
the current through the cluster is blocked
because the electrons in the leads do not have
enough energy to tunnel onto the cluster (their
energy is lower than the charging energy of the
cluster). Areas represented with different
colours correspond to processes where one or more
electrons can tunnel simultaneously through. See
also APL 76, 384-386 (2000)
Scanning gate spectroscopy of a 20-nm Au cluster
at 4.2 K. Two I-V curves taken with the
scanning-gate tip positioned on top of a cluster
for two different gate voltages Vg -2.4 and
15.6 V, corresponding to an induced charge on the
cluster Q0 0 and e/2 respectively. Inset
Current versus gate voltage characteristic with
bias voltage Vb 8.4 mV.
Gated spectroscopy measured on a 20-nm gold
particle represented as a 3D colour plot. Using
the orthodox theory of single electron tunnelling
we can calculate the values for the capacitances
and resistances of the tunnel barriers and for
the gate capacitance C1 8?10-18 F, C2
1?10-18 F, Cg 5?10-21 F, R1 2 G?, R2 50 M?,
where C1 and R1 refer to the tip-cluster barrier,
C2 and R2 refer to the cluster-substrate barrier
and Cg is the gate-cluster capacitance.
Fabrication recipe for the scanning gate probes.
a) We start with a Si (001) wafer covered on
both sides with a multilayer of SiNx-SiO2-SiNx,
100 nm per layer, deposited by low-pressure
chemical vapour deposition (top inset). b) We
pattern the backside of the wafer by optical
lithography and then we etch through the
multilayer by reactive ion etching using CHF3.
Afterwards we etch the silicon wafer through its
entire thickness in a 30-KOH aqueous solution
with addition of isopropanol at 80 C.
b)
b)
d)
a)
a)
Au Cluster
Cysteamine Monolayer
S
S
S
S
S
S
S
S
S
N
N
N
N
N
N
N
N
N
GaTe
Pt Substrate
c)
Clusters were deposited on a Pt film covered by
an organic monolayer, which provides a tunnel
barrier between the clusters and metal
substrate. The monolayer is also responsible for
binding the clusters and preventing them from
moving on the substrate. a) STM topography
(100?100 nm²) of the sample imaged with a
scanning gate probe at 4.2 K. A few 20-nm Au
clusters are visible in the scan area. b) To form
the monolayer, we dipped the Si-SiO2 wafer
covered with a 20-50 nm Pt film into a 0.1 mM
solution of cysteamine in 11 mixture of ethanol
and hexane for 12-24 hours. Cysteamine molecules
are rather short (they contain only two carbon
atoms) and have both thiol and amine end groups
capable of attaching to metal surfaces. c) The
optimal concentration of clusters was found by
AFM imaging. The figure shows a 1x1 ?m2
tapping-mode AFM image of the sample 20-nm Au
clusters are visible as bright spots. d) The STM
tip is positioned above a metallic cluster (drain
electrode). An electron coming from the tip will
first tunnel onto the cluster and then tunnel
into the conducting substrate (source). A gate
electrode can be used to change the offset charge
of the cluster, thus forming a system equivalent
to a single-electron transistor.
c) Next we fabricate the Pt tip electrode by
e-beam lithography, evaporation and lift-off. The
tip is aligned to the sharp end of the silicon
chip d) An Al-mask is fabricated on top of the
membrane and aligned to the tip electrode, by
means of e-beam lithography, evaporation and
lift-off. We use the mask to protect the tip
while we etch through the multilayer by
anisotropic plasma etching with CHF3 and form a
sharp, freestanding cantilever. e). We underetch
the oxide part of the SiNx-SiO2-SiNx multilayer
by dipping the wafer in BHF solution to prevent
unwanted electrical contacts between the final
top and bottom electrodes (lower inset). Last we
evaporate the platinum gate electrode on the
backside of the chip.