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DS4 Deliverables

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3. Design, fabrication and testing of SiGe band pass filter using PIC Technology ... 9. Fabricate and test of advanced integrated interconnect technologies with Si ... – PowerPoint PPT presentation

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Title: DS4 Deliverables


1
DS4 Deliverables
  • Andrew Faulkner

2
T1 Front End technologies - 1
Due T0 0-12 9-15 6-18 15-36 1-12 12-30
Act T0 12 12 1218 OK 15 24-36
1. Establish benchmark LNA simulations to provide
performance feedback for device process
development for various semiconductor
technologies. 2. RF on wafer (RFOW) measurements
on device wafers fabricated (Maximum of 6
iterations), extract scaleable equivalent circuit
model. 3. Design, fabrication and testing of SiGe
band pass filter using PIC Technology 4. LNA
design techniques simulation study determine
optimum design approach, including consideration
of circuit topologies best suited for achieving
wide operating bandwidth, linearity, low noise
temperature, high yield and low cost 5. ADC
Design rule established and recommended ADC
architectures selected. 6. ADC building blocks
design, fabrication and performance
3
T1 Front End technologies - 2
Due T0 18-24 18-30 24-48 24-48 24-48 44-48
Act T0 1st done In prog. 6 mth delay OK OK OK
TBD
7. Design, manufacture and test of hybrid LNA
using novel discrete devices developed in
programme (two iterations) 8. Fabricate and test
Integrated ADC circuits 9. Fabricate and test of
advanced integrated interconnect technologies
with Si and GaAs technologies. 10. Fabricate and
test further LNA technologies iterations 2 and
3. 11. Fabricate and test further ADC
technologies - iterations 2 and 3 12. Final
report on different semiconductor technologies
4
T2 Signal Control Digitisation
Due T0 9 9 18 9 6 36
Act T0 Done Done Done Done Done OK
1. Wide band, high dynamic range A/D blocks (task
linked with DS4-T1 and DS4-T3) 2. Digital Down
Converters 3. Sizing of the digital word at the
different levels of the system chain 4. Low cost
Poly-Phase filter banks 5. Data distribution and
synchronization 6. A quasi-perfect reconstruction
equi-spaced filter bank channelizer
5
T3 RFI mitigation techniques
Pretty much done
Due T0 12 36 24 36
Act T0 36-48 48 48 48
1. Develop RFI mitigation strategies for the
phased-array concept of SKA, at a station level
and for the instrument as a whole 2. Assess the
influence of these methods on data quality 3.
Assess the cost effectiveness of these methods
for the RFI environment of the selected SKA
site 4. Demonstrate practical RFI mitigation
techniques for the EMBRACE and BEST SKADS
demonstrators in particular, and in more general
terms for focal plane arrays.
Much of this work has been late starting and
limited on resource Also, cyclostationary
interference studies have been added There is
little impact on other tasks The work will be
completed by the end of SKADS
6
T4 Wideband integrated antennas
Due T0 48 48 48 48 48 48
Act T0 OK OK OK ?? OK OK
1. Wide band integrated antenna, dual
polarization 2. Low cost antenna technology 3.
Low cost packaging solutions 4. Low cost analogue
photonic link 5. Reports on all of the above
deliverables 6. Publications and PhD thesis
7
T5 Beam forming at patch level
Due T0 18 24 48 24 48
Act T0 --- 24 OK 25 OK
1. Prototype analogue beamformer in GaAs for
EMBRACE. Superceded by Deliverable 2 Si. 2.
Prototype of a lower cost analogue beam-former in
Silicon (not in time for EMBRACE.) 3. Prototype
digital beamformer for 2-PAD. 4. Architecture
design for the whole digital beam-forming system
for 2-PAD. 5. A final report on the trade-offs
and cost-effectiveness of analogue and digital
beam-forming systems.
8
T6 The 2-PAD demonstrator
Due T0 42 36-42 42-48 48 48 48
Act T0 42 OK 48 48 OK OK
1. Dual polarization all-digital tile 2. Design
documentation package for all-digital tile 3.
Test environment for prototype all-digital
tile. 4. Evaluation report of tile
performance. 5. Tile cost estimates projected for
SKA volumes and timescales. 6. Reliability
analysis report.
2-PAD is entering a critical phase. It appears to
be tight but on time Cost estimates will be part
of DS3-T3 Cost modelling
9
Summary
  • We anticipate meeting all deliverables by end
    SKADS
  • DS4-T2 is in the process of catching up
  • 2-PAD is entering a critical phase
  • It is essential that the quality of the
    deliverables meets SKA requirements
  • The results of this development work are vital to
    ongoing work in PrepSKA era.
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